| 12178052 |
MRAM circuit structure and layout structure |
Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Jian-Jhong Chen +1 more |
2024-12-24 |
| 11955154 |
Sense amplifier circuit with temperature compensation |
Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Jian-Jhong Chen +1 more |
2024-04-09 |
| 11942130 |
Bottom-pinned spin-orbit torque magnetic random access memory and method of manufacturing the same |
Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang |
2024-03-26 |
| 11903325 |
Magnetic memory device having shared source line and bit line |
Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang +2 more |
2024-02-13 |
| 11355695 |
Magnetic memory device having shared source line and bit line |
Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang +2 more |
2022-06-07 |
| 11238912 |
Magnetoresistive random-access memory |
Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Jian-Jhong Chen +1 more |
2022-02-01 |
| 11018185 |
Layout pattern for magnetoresistive random access memory |
Yi-Ting Wu, Jian-Jhong Chen, Po-Chun Yang, Jhen-Siang Wu, Bo-Chang Li +2 more |
2021-05-25 |
| 10978122 |
Memory including non-volatile cells and current driving circuit |
Chun-Yen Tseng, Yu-Tse Kuo, Chang-Hung Chen, Shu-Ru Wang, Ya-Lan Chiou +10 more |
2021-04-13 |
| 10651235 |
2-transistor 2-magnetic tunnel junction (2T2MTJ) MRAM structure |
Yi-Ting Wu, Jhen-Siang Wu, Po-Chun Yang, Zong-Sheng Zheng, Jian-Jhong Chen +2 more |
2020-05-12 |
| 9679622 |
Method for controlling memory device asynchronously with respect to system clock, and related memory device and memory system |
Gyh-Bin Wang, Tah-Kang Joseph Ting |
2017-06-13 |
| 5801997 |
Ping-pong boost circuit |
Chung-Wei Hsieh, Tah-Kang Joseph Ting |
1998-09-01 |
| 5754479 |
Distributed bit switch logically interleaved for block write performance |
Tah-Kang Joseph Ting, Chun Shiah |
1998-05-19 |
| 5737271 |
Semiconductor memory arrays |
Tah-Kang Joseph Ting, Bor-Doou Rong |
1998-04-07 |
| 5689200 |
High speed glitch-free transition detection circuit with disable control |
Tah-Kang Joseph Ting, Jeng-Tzong Shih |
1997-11-18 |
| 5506815 |
Reconfigurable multi-user buffer memory particularly for signal processing system |
Yin H. Lieu |
1996-04-09 |