Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12340830 | Spin-orbit torque magnetic random access memory circuit and layout thereof | Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yi-Ting Wu +2 more | 2025-06-24 |
| 12341081 | Semiconductor device and manufacturing method thereof | Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao | 2025-06-24 |
| 12178052 | MRAM circuit structure and layout structure | Yi-Ting Wu, Cheng-Tung Huang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen +1 more | 2024-12-24 |
| 11996351 | Packaged semiconductor device including liquid-cooled lid and methods of forming the same | Sheng-Tsung Hsiao, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung | 2024-05-28 |
| 11955154 | Sense amplifier circuit with temperature compensation | Cheng-Tung Huang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen +1 more | 2024-04-09 |
| 11955405 | Semiconductor package including thermal interface structures and methods of forming the same | Chung-Jung Wu, Sheng-Tsung Hsiao, Tung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu | 2024-04-09 |
| 11942130 | Bottom-pinned spin-orbit torque magnetic random access memory and method of manufacturing the same | Jian-Jhong Chen, Yi-Ting Wu, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh | 2024-03-26 |
| 11903325 | Magnetic memory device having shared source line and bit line | Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh +2 more | 2024-02-13 |
| 11901263 | Semiconductor device and manufacturing method thereof | Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao | 2024-02-13 |
| 11699705 | Semiconductor device | Yen-Wei Tung, Cheng-Tung Huang, Yan-Jou Chen | 2023-07-11 |
| 11637103 | Semiconductor device | Yen-Wei Tung, Cheng-Tung Huang, Yan-Jou Chen | 2023-04-25 |
| 11631629 | Semiconductor device and manufacturing method thereof | Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao | 2023-04-18 |
| 11569147 | Method of forming semiconductor package with composite thermal interface material structure | Tung-Liang Shao, Chung-Jung Wu, Chih-Hang Tung, Chen-Hua Yu | 2023-01-31 |
| 11410910 | Packaged semiconductor device including liquid-cooled lid and methods of forming the same | Sheng-Tsung Hsiao, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung | 2022-08-09 |
| 11387164 | Semiconductor device and manufacturing method thereof | Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao | 2022-07-12 |
| 11355695 | Magnetic memory device having shared source line and bit line | Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh +2 more | 2022-06-07 |
| 11238912 | Magnetoresistive random-access memory | Yi-Ting Wu, Cheng-Tung Huang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen +1 more | 2022-02-01 |
| 11171137 | Method of making FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions | Yen-Wei Tung, Cheng-Tung Huang, Yan-Jou Chen | 2021-11-09 |
| 11107747 | Semiconductor package with composite thermal interface material structure and method of forming the same | Tung-Liang Shao, Chung-Jung Wu, Chih-Hang Tung, Chen-Hua Yu | 2021-08-31 |
| 11018185 | Layout pattern for magnetoresistive random access memory | Yi-Ting Wu, Jian-Jhong Chen, Po-Chun Yang, Jhen-Siang Wu, Yung-Ching Hsieh +2 more | 2021-05-25 |
| 10978122 | Memory including non-volatile cells and current driving circuit | Chun-Yen Tseng, Yu-Tse Kuo, Chang-Hung Chen, Shu-Ru Wang, Ya-Lan Chiou +10 more | 2021-04-13 |
| 10651235 | 2-transistor 2-magnetic tunnel junction (2T2MTJ) MRAM structure | Yi-Ting Wu, Jhen-Siang Wu, Po-Chun Yang, Yung-Ching Hsieh, Zong-Sheng Zheng +2 more | 2020-05-12 |
| 10483264 | FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions | Yen-Wei Tung, Cheng-Tung Huang, Yan-Jou Chen | 2019-11-19 |
| 10056463 | Transistor and manufacturing method thereof | Su Xing, Hsueh-Wen Wang, Chien-Yu Ko, Yu-Cheng Tung, Cheng-Tung Huang +1 more | 2018-08-21 |
| 9793296 | Method for fabricating substrate of semiconductor device including epitaxial layer and silicon layer having same crystalline orientation | Wen-Yin Weng, Cheng-Tung Huang, Ya-Ru Yang, Yi-Ting Wu, Yu-Ming Lin | 2017-10-17 |