Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11903325 | Magnetic memory device having shared source line and bit line | Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh +2 more | 2024-02-13 |
| 11784265 | Mercury cadmium telluride-black phosphorous van der waals heterojunction infrared polarization detector and preparation method thereof | Xudong Wang, Hanxue Jiao, Jianlu Wang, Xiangjian Meng, Hong Shen +2 more | 2023-10-10 |
| 11699705 | Semiconductor device | Yen-Wei Tung, Jen-Yu Wang, Cheng-Tung Huang | 2023-07-11 |
| 11637103 | Semiconductor device | Yen-Wei Tung, Jen-Yu Wang, Cheng-Tung Huang | 2023-04-25 |
| 11355695 | Magnetic memory device having shared source line and bit line | Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh +2 more | 2022-06-07 |
| 11300821 | Method for manufacturing a display substrate comprising forming a planarization layer having a hydrophilic material and a hydrophobic material mixed in a host material, display substrate, and display apparatus | Guohua Wang, Xing Su | 2022-04-12 |
| 11171137 | Method of making FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions | Yen-Wei Tung, Jen-Yu Wang, Cheng-Tung Huang | 2021-11-09 |
| 11063069 | Method for manufacturing display substrate | Feng Guan, Chen Xu, Zhi Wang, Liwei Liu, Lei Chen +1 more | 2021-07-13 |
| 10831072 | Light shielding structure and laser device | Xueyong Wang, Feng Wang, Guozhong Jiang | 2020-11-10 |
| 10483264 | FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions | Yen-Wei Tung, Jen-Yu Wang, Cheng-Tung Huang | 2019-11-19 |
| 10135217 | Optical device and excimer laser annealing equipment | Xiangjun Tian, Xueyong Wang, Zhi Wang | 2018-11-20 |
| 8723776 | Gate driving circuit receiving a plurality of clock signals and having forward and reverse driving modes and driving method thereof | Hsien-Cheng Chang | 2014-05-13 |
| 8305329 | Integrated gate driver circuit and driving method therefor | Yung-Hsin Lu, Chia-Hua Yu, Sung-Chun Lin | 2012-11-06 |
| 8300002 | Gate drive circuit having at least three clock signals and having forward and reverse driving modes and driving method thereof | Hsien-Cheng Chang | 2012-10-30 |
| 8299821 | Integrated gate driver circuit | Hsien-Cheng Chang | 2012-10-30 |
| 8072411 | Gate line driving circuit of LCD panel | Hung-Jen Wang | 2011-12-06 |