Issued Patents All Time
Showing 25 most recent of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12341011 | Method for forming and using mask | Ching-Yu Chang, Tze-Liang Lee | 2025-06-24 |
| 12322590 | Semiconductor device and method | Ching-Yu Chang, Tze-Liang Lee | 2025-06-03 |
| 12308283 | Method for forming interconnect structure | Chun-Kai Chen, Tze-Liang Lee | 2025-05-20 |
| 12217971 | Method for forming semiconductor device | Ching-Yu Chang, Tze-Liang Lee | 2025-02-04 |
| 12087644 | Methods of determining process recipes and forming a semiconductor device | Jung-Hau Shiu, Ching-Yu Chang, Jr-Yu Chen, Tze-Liang Lee | 2024-09-10 |
| 11990375 | Semiconductor Fin cutting process and structures formed thereby | Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin | 2024-05-21 |
| 11887851 | Method for forming and using mask | Ching-Yu Chang, Tze-Liang Lee | 2024-01-30 |
| 11854798 | Semiconductor device and method | Ching-Yu Chang, Tze-Liang Lee | 2023-12-26 |
| 11842922 | Method for forming interconnect structure | Chun-Kai Chen, Tze-Liang Lee | 2023-12-12 |
| 11482411 | Semiconductor device and method | Ching-Yu Chang, Tze-Liang Lee | 2022-10-25 |
| 11380593 | Semiconductor fin cutting process and structures formed thereby | Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin | 2022-07-05 |
| 11101366 | Remote plasma oxide layer | Iwen Hsu | 2021-08-24 |
| 10957585 | Semiconductor device and method of forming the same | I-Wen Hsu, Yu-Yun Peng, An-Di Sheu | 2021-03-23 |
| 10777466 | Semiconductor Fin cutting process and structures formed thereby | Shih-Wen Huang, Chia-Hui Lin, Jaming Chang, Kai Hung Cheng | 2020-09-15 |
| 10727064 | Post UV cure for gapfill improvement | De-Wei Yu, Chien-Hao Chen, Chih-Tang Peng, Shu-Yi Wang | 2020-07-28 |
| 10332746 | Post UV cure for gapfill improvement | De-Wei Yu, Chien-Hao Chen, Chih-Tang Peng, Shu-Yi Wang | 2019-06-25 |
| 9502305 | Method for manufacturing CMOS transistor | Yi-Wei Chen, Teng-Chun Tsai, Chien-Chung Huang, Tsai-Fu Hsiao | 2016-11-22 |
| 9362358 | Spatial semiconductor structure | Hung-Lin Shih, Chih-Chien Liu, Wen-Yi Teng, Chieh-Wen Lo | 2016-06-07 |
| 9343573 | Method of fabrication transistor with non-uniform stress layer with stress concentrated regions | Chih-Chien Liu, Tzu-Chin Wu, Yu-Shu Lin, Wen-Yi Teng | 2016-05-17 |
| 9105582 | Spatial semiconductor structure and method of fabricating the same | Hung-Lin Shih, Chih-Chien Liu, Wen-Yi Teng, Chieh-Wen Lo | 2015-08-11 |
| 9034726 | Semiconductor process | Chih-Chien Liu, Chia-Lung Chang, Jui-Min Lee, Yuh-Min Lin | 2015-05-19 |
| 9034759 | Method for forming interlevel dielectric (ILD) layer | Yuh-Min Lin | 2015-05-19 |
| 8951884 | Method for forming a FinFET structure | Hung-Lin Shih, Chih-Chien Liu, Chin-Fu Lin, Kuan-Hsien Li | 2015-02-10 |
| 8937369 | Transistor with non-uniform stress layer with stress concentrated regions | Chih-Chien Liu, Tzu-Chin Wu, Yu-Shu Lin, Wen-Yi Teng | 2015-01-20 |
| 8927388 | Method of fabricating dielectric layer and shallow trench isolation | Wen-Yi Teng, Chia-Lung Chang, Chih-Chien Liu | 2015-01-06 |