CL

Chu-Fu Lin

UM United Microelectronics: 14 patents #431 of 4,560Top 10%
ME Megica: 3 patents #15 of 32Top 50%
MA Megit Acquisition: 1 patents #5 of 12Top 45%
Overall (All Time): #249,887 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12040354 Capacitor structure and method for manufacturing the same Teng-Chuan Hu, Chun-Hung Chen 2024-07-16
12034038 Method for manufacturing capacitor structure Teng-Chuan Hu, Chun-Hung Chen 2024-07-09
11646343 Capacitor structure and method for manufacturing the same Teng-Chuan Hu, Chun-Hung Chen 2023-05-09
11616035 Semiconductor structure Teng-Chuan Hu, Chun-Hung Chen 2023-03-28
10886241 Semiconductor package structure Chun-Hung Chen, Ming-Tse Lin 2021-01-05
10818616 Semiconductor package structure and method for forming the same Chun-Hung Chen, Ming-Tse Lin 2020-10-27
10504821 Through-silicon via structure Ming-Tse Lin, Kuei-Sheng Wu 2019-12-10
10340231 Semiconductor package structure and method for forming the same Chun-Hung Chen, Ming-Tse Lin 2019-07-02
10192808 Semiconductor structure Teng-Chuan Hu, Chun-Hung Chen, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin 2019-01-29
9437491 Method of forming chip with through silicon via electrode Ming-Tse Lin, Chien-Li Kuo, Yung-Chang Lin 2016-09-06
9269645 Fan-out wafer level package Chien-Li Kuo, Kuo-Ming Chen 2016-02-23
9123789 Chip with through silicon via electrode and method of forming the same Ming-Tse Lin, Chien-Li Kuo, Yung-Chang Lin 2015-09-01
9035457 Substrate with integrated passive devices and method of manufacturing the same Ming-Tse Lin, Yung-Chang Lin 2015-05-19
8884398 Anti-fuse structure and programming method thereof Chien-Li Kuo, Ching-Li Yang 2014-11-11
8674507 Wafer level processing method and structure to manufacture two kinds of interconnects, gold and solder, on one wafer Chien-Kang Chou, Chiu-Ming Chou, Li-Ren Lin 2014-03-18
7977803 Chip structure with bumps and testing pads Nick Kuo, Chiu-Ming Chou, Chien-Kang Chou 2011-07-12
7855461 Chip structure with bumps and testing pads Nick Kuo, Chiu-Ming Chou, Chien-Kang Chou 2010-12-21
7394161 Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto Nick Kuo, Chiu-Ming Chou, Chien-Kang Chou 2008-07-01