Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8549608 | Implement method and device of terminal call firewall | — | 2013-10-01 |
| 8455268 | Gate replacement with top oxide regrowth for the top oxide improvement | Chungho Lee, Hiroyuki Kinoshita, Kuo-Tung Chang, Rinji Sugino, Chi Chang | 2013-06-04 |
| 8330209 | HTO offset and BL trench process for memory device to improve device performance | Ning Cheng, Hiro Kinoshita, Jihwan P. Choi | 2012-12-11 |
| 8329598 | Sacrificial nitride and gate replacement | Chungho Lee, Kuo-Tung Chang, Hiroyuki Kinoshita, Fred Cheung | 2012-12-11 |
| 8039891 | Split charge storage node outer spacer process | Minghao Shen, Chungho Lee, Hiroyuki Kinoshita | 2011-10-18 |
| 8012830 | ORO and ORPRO with bit line trench to suppress transport program disturb | Ning Cheng, Kuo-Tung Chang, Hiro Kinoshita, Chih-Yuh Yang, Lei Xue +3 more | 2011-09-06 |
| 7981745 | Sacrificial nitride and gate replacement | Chungho Lee, Kuo-Tung Chang, Hiroyuki Kinoshita, Fred Cheung | 2011-07-19 |
| 7943983 | HTO offset spacers and dip off process to define junction | Hiro Kinoshita, Ning Cheng, Arturo Ruiz, Jihwan P. Choi | 2011-05-17 |
| 7935596 | HTO offset and BL trench process for memory device to improve device performance | Ning Cheng, Hiro Kinoshita, Jihwan P. Choi | 2011-05-03 |
| 7906807 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Harpreet Sachar +3 more | 2011-03-15 |
| 7883963 | Split charge storage node outer spacer process | Minghao Shen, Chungho Lee, Hiroyuki Kinoshita | 2011-02-08 |
| 7867335 | GaN bulk growth by Ga vapor transport | Michael Spencer, Phani Konkapaka, Yuri Makarov | 2011-01-11 |
| 7829936 | Split charge storage node inner spacer process | Minghao Shen, Shenqing Fang, Wai Lo, Christie Marrian, Chungho Lee +2 more | 2010-11-09 |
| 7807580 | Triple poly-si replacement scheme for memory devices | Chungho Lee, Wai Lo, Hiroyuki Kinoshita | 2010-10-05 |
| 7776688 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Harpreet Sachar +3 more | 2010-08-17 |
| 7772288 | Group III nitride coatings and methods | Michael Spencer, Emmanuel P. Giannelis, Athanasios Bourlinos | 2010-08-10 |
| 7569206 | Group III nitride compositions | Michael Spencer, Francis J. DiSalvo | 2009-08-04 |
| 7381391 | Method of making Group III nitrides | Michael Spencer, Francis J. DiSalvo | 2008-06-03 |