Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10446443 | Integrated circuit product having a through-substrate-via (TSV) and a metallization layer that are formed after formation of a semiconductor device | Himani Suhag Kamineni, Vimal Kamineni, Daniel M. Smith | 2019-10-15 |
| 9917009 | Methods of forming a through-substrate-via (TSV) and a metallization layer after formation of a semiconductor device | Himani Suhag Kamineni, Vimal Kamineni, Daniel M. Smith | 2018-03-13 |
| 8497565 | Multiple electrode layer backend stacked capacitor | Byron Lovell Willaims, Betty Mercer, Scott Montgomery, Binghua Hu | 2013-07-30 |
| 8431463 | Capacitor contact formed concurrently with bond pad metallization | Stephen Arlon Meisner, Lee Alan Stringer, Stephen F. Clark, Fred Percy Debnam, II, Byron Lovell Williams | 2013-04-30 |
| 7902033 | Methods and devices for a high-k stacked capacitor | Byron Lovell Williams, Betty Mercer, Scott Montgomery, Binghua Hu | 2011-03-08 |
| 7800226 | Integrated circuit with metal silicide regions | Yuanning Chen, William M. Moller | 2010-09-21 |
| 7670920 | Methods and apparatus for forming a polysilicon capacitor | Byron Lovell Williams, C. Matthew Thompson | 2010-03-02 |
| 7250356 | Method for forming metal silicide regions in an integrated circuit | Yuanning Chen, William M. Moller | 2007-07-31 |
| 7033931 | Temperature optimization of a physical vapor deposition process to prevent extrusion into openings | Craig Clabough, Joseph W. Buckfeller, Timothy Daniel | 2006-04-25 |
| 6010828 | Method of and device for planarizing a surface of a semiconductor wafer | — | 2000-01-04 |
| 5235205 | Laser trimmed integrated circuit | — | 1993-08-10 |
| 5096850 | Method of laser trimming | — | 1992-03-17 |