Issued Patents All Time
Showing 751–775 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6990620 | Scanning a protocol signal into an IC for performing a circuit operation | — | 2006-01-24 |
| 6987382 | System with functional and selector circuits connected by mode lead | — | 2006-01-17 |
| 6985001 | Testing ICs with distributor, collector, and parallel scan paths | — | 2006-01-10 |
| 6975980 | Hierarchical linking module connection to access ports of embedded cores | — | 2005-12-13 |
| 6963225 | Quad state logic design methods, circuits, and systems | — | 2005-11-08 |
| 6959408 | IC with serial scan path, protocol memory, and event circuit | — | 2005-10-25 |
| 6954080 | Method and apparatus for die testing on wafer | — | 2005-10-11 |
| 6944247 | Plural circuit selection using role reversing control inputs | — | 2005-09-13 |
| 6898749 | IC with cache bit memory in series with scan segment | Joel J. Graber | 2005-05-24 |
| 6898544 | Instruction register and access port gated clock for scan cells | — | 2005-05-24 |
| 6894308 | IC with comparator receiving expected and mask data from pads | Alan Hales | 2005-05-17 |
| 6877122 | Link instruction register providing test control signals to core wrappers | — | 2005-04-05 |
| 6813738 | IC test cell with memory output connected to input multiplexer | — | 2004-11-02 |
| 6804725 | IC with state machine controlled linking module | — | 2004-10-12 |
| 6779133 | IC with two state machines connected to serial scan path | — | 2004-08-17 |
| 6769080 | Scan circuit low power adapter with counter | — | 2004-07-27 |
| 6766487 | Divided scan path with decode logic receiving select control signals | Jayashree Saxena | 2004-07-20 |
| 6763487 | IC with latching and switched I/O buffers | — | 2004-07-13 |
| 6763488 | Generator/compactor scan circuit low power adapter with counter | — | 2004-07-13 |
| 6763485 | Position independent testing of circuits | — | 2004-07-13 |
| 6731106 | Measuring on-resistance of an output buffer with test terminals | — | 2004-05-04 |
| 6728915 | IC with shared scan cells selectively connected in scan path | — | 2004-04-27 |
| 6727722 | Process of testing a semiconductor wafer of IC dies | — | 2004-04-27 |
| 6717429 | IC having comparator inputs connected to core circuitry and output pad | — | 2004-04-06 |
| 6711707 | Process of controlling plural test access ports | Baher Haroun | 2004-03-23 |