Issued Patents All Time
Showing 776–800 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6694467 | Low power testing of very large circuits | — | 2004-02-17 |
| 6694465 | Low overhead input and output boundary scan cells | — | 2004-02-17 |
| 6678188 | Quad state memory design methods, circuits, and systems | — | 2004-01-13 |
| 6675333 | Integrated circuit with serial I/O controller | Benjamin H. Ashmore, Jr. | 2004-01-06 |
| 6658615 | IC with IP core and user-added scan register | — | 2003-12-02 |
| 6646460 | Parallel scan distributors and collectors and process of testing integrated circuits | — | 2003-11-11 |
| 6643810 | Integrated circuits carrying intellectual property cores and test ports | — | 2003-11-04 |
| 6636076 | Quad state logic design methods, circuits, and systems | — | 2003-10-21 |
| 6611934 | Boundary scan test cell circuit | — | 2003-08-26 |
| 6594789 | Input data capture boundary cell connected to target circuit output | — | 2003-07-15 |
| 6590225 | Die testing using top surface test pads | Richard L. Antley | 2003-07-08 |
| 6560734 | IC with addressable test port | — | 2003-05-06 |
| 6519729 | Reduced power testing with equally divided scan paths | — | 2003-02-11 |
| 6499070 | Circuitry and method of transferring parallel and serial data | — | 2002-12-24 |
| 6490641 | Addressable shadow port circuit | — | 2002-12-03 |
| 6442721 | Accelerating scan test by re-using response data as stimulus data | — | 2002-08-27 |
| 6408413 | Hierarchical access of test access ports in embedded core integrated circuits | — | 2002-06-18 |
| 6405335 | Position independent testing of circuits | — | 2002-06-11 |
| 6393081 | Plural circuit selection using role reversing control inputs | — | 2002-05-21 |
| 6378095 | Dual mode memory for IC terminals | — | 2002-04-23 |
| 6378093 | Controller for scan distributor and controller architecture | — | 2002-04-23 |
| 6363443 | Addressable shadow port and protocol for serial bus networks | — | 2002-03-26 |
| 6362015 | Process of making an integrated circuit using parallel scan paths | — | 2002-03-26 |
| 6326801 | Wafer of semiconductor material with dies, probe areas and leads | — | 2001-12-04 |
| 6324614 | Tap with scannable control circuit for selecting first test data register in tap or second test data register in tap linking module for scanning data | — | 2001-11-27 |