Issued Patents All Time
Showing 726–750 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7213171 | IEEE 1149.1 tap instruction scan with augmented TLM scan mode | Baher Haroun | 2007-05-01 |
| 7200783 | Removable and replaceable TAP domain selection circuitry | — | 2007-04-03 |
| 7183570 | IC with comparator receiving expected and mask data from pads | Alan Hales | 2007-02-27 |
| 7183789 | Comparing on die response and expected response applied to outputs | — | 2007-02-27 |
| 7185250 | Tap with separate scan cell in series with instruction register | — | 2007-02-27 |
| 7180319 | Selecting groups of dies for wafer testing | — | 2007-02-20 |
| 7180971 | Selecting between two TAP circuits with MODE/TCK and TCK/MODE signals | — | 2007-02-20 |
| 7157939 | Quad state memory with converter feedback, transmission, and clock circuitry | — | 2007-01-02 |
| 7155646 | Tap and test controller with separate enable inputs | — | 2006-12-26 |
| 7155650 | IC with separate scan paths and shift states | — | 2006-12-26 |
| 7131044 | Means scanning scan path parts sequentially and capturing response simultaneously | — | 2006-10-31 |
| 7124341 | Integrated circuit having electrically isolatable test circuitry | Richard L. Antley | 2006-10-17 |
| 7120843 | IC with scan distributor and scan collector circuitry | — | 2006-10-10 |
| 7106097 | IC with dual input output memory buffer | — | 2006-09-12 |
| 7073111 | High speed interconnect circuit test method and apparatus | — | 2006-07-04 |
| 7069485 | Reading data from a memory with a memory access controller | Benjamin H. Ashmore, Jr. | 2006-06-27 |
| 7065692 | IC with external register present lead connected to instruction register | — | 2006-06-20 |
| 7056752 | Fabricating a die with test enable circuits between embedded cores | Richard L. Antley | 2006-06-06 |
| 7058871 | Circuit with expected data memory coupled to serial input lead | — | 2006-06-06 |
| 7058862 | Selecting different 1149.1 TAP domains from update-IR state | Baher Haroun, Brian J. Lasher, Anjali Kinra | 2006-06-06 |
| 7051256 | Processor emulator transferring data with emulation controller continuously without interruption | — | 2006-05-23 |
| 7051257 | Means scanning scan path parts sequentially and capturing response simultaneously | — | 2006-05-23 |
| 7013416 | IC with expected data memory coupled to scan data register | — | 2006-03-14 |
| 7003707 | IC tap/scan test port access with tap lock circuitry | — | 2006-02-21 |
| 6996761 | IC with protocol selection memory coupled to serial scan path | — | 2006-02-07 |