Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11393677 | Semiconductor device structure with gate spacer | Guan-Yao Tu | 2022-07-19 |
| 11373866 | Dielectric material and methods of forming same | — | 2022-06-28 |
| 11282712 | Method for preventing bottom layer wrinkling in a semiconductor device | Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee | 2022-03-22 |
| 11257753 | Interconnect structure and method for manufacturing the interconnect structure | KHADERBAD MRUNAL ABHIJITH, Fu-Ting Yen, Chen-Han Wang, Tsu-Hsiu Perng, Keng-Chu Lin | 2022-02-22 |
| 11227794 | Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure | Sung-Li Wang, Shuen-Shin Liang, Fang-Wei Lee, Chia-Hung Chu, Mrunal A. Khaderbad +1 more | 2022-01-18 |
| 11158539 | Method and structure for barrier-less plug | Sung-Li Wang, Hung-Yi Huang, Mrunal A. Khaderbad, Chia-Hung Chu, Shuen-Shin Liang +1 more | 2021-10-26 |
| 11018258 | Device of dielectric layer | Keng-Chu Lin | 2021-05-25 |
| 10991636 | Semiconductor device and method | Yin-Jie Pan | 2021-04-27 |
| 10971391 | Dielectric gap fill | — | 2021-04-06 |
| 10957585 | Semiconductor device and method of forming the same | I-Wen Hsu, An-Di Sheu, Jei-Ming Chen | 2021-03-23 |
| 10957543 | Device and method of dielectric layer | Chung-Chi Ko, Keng-Chu Lin | 2021-03-23 |
| 10950731 | Inner spacers for gate-all-around semiconductor devices | Fu-Ting Yen, Ting-Ting Chen, Keng-Chu Lin, Tsu-Hsiu Perng | 2021-03-16 |
| 10879111 | Dielectric plugs | Fu-Ting Yen, Ting-Ting Chen, Keng-Chu Lin | 2020-12-29 |
| 10872762 | Methods of forming silicon oxide layer and semiconductor structure | — | 2020-12-22 |
| 10867785 | Structure and formation method of semiconductor device with gate spacer | Guan-Yao Tu | 2020-12-15 |
| 10669625 | Pumping liner for chemical vapor deposition | Cheng-Hsiung Liu, Chun-Hao Hsu, Chih-Yuan Yao, Chia-I Shen, Keng-Chu Lin | 2020-06-02 |
| 10535512 | Formation method of semiconductor device with gate spacer | Guan-Yao Tu | 2020-01-14 |
| 10515822 | Method for preventing bottom layer wrinkling in a semiconductor device | Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee | 2019-12-24 |
| 10510584 | Via patterning using multiple photo multiple etch | Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh | 2019-12-17 |
| 10510895 | Device and method of dielectric layer | Keng-Chu Lin | 2019-12-17 |
| 10361137 | Semiconductor device and method | Yin-Jie Pan | 2019-07-23 |
| 10340178 | Via patterning using multiple photo multiple etch | Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh | 2019-07-02 |
| 10290739 | Device and method of dielectric layer | Keng-Chu Lin | 2019-05-14 |
| 10141220 | Via patterning using multiple photo multiple etch | Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh | 2018-11-27 |
| 10134632 | Low-K dielectric layer and porogen | Joung-Wei Liou, Hui-Chun Yang, Keng-Chu Lin | 2018-11-20 |