Issued Patents All Time
Showing 51–75 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11563083 | Dual side contact structures in semiconductor devices | Cheng-Wei Chang, Shuen-Shin Liang, Hsu-Kai Chang, Chia-Hung Chu, Chien-Shun Liao +1 more | 2023-01-24 |
| 11557484 | Contact structures with deposited silicide layers | Yasutoshi Okuno, Shih-Chuan Chiu | 2023-01-17 |
| 11545429 | Interconnect structures having lines and vias comprising different conductive materials | Yasutoshi Okuno | 2023-01-03 |
| 11521929 | Capping layer for liner-free conductive structures | Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Chun-Hsien Huang, Hung-Yi Huang +4 more | 2022-12-06 |
| 11489057 | Contact structures in semiconductor devices | Hsu-Kai Chang, Jhih-Rong Huang, Yen-Tien Tung, Chia-Hung Chu, Shuen-Shin Liang +2 more | 2022-11-01 |
| 11482458 | Selective dual silicide formation | Peng-Wei Chu, Yasutoshi Okuno | 2022-10-25 |
| 11476365 | Fin field effect transistor device structure and method for forming the same | Chia-Hung Chu, Fang-Wei Lee, Jung-Hao Chang, Mrunal A. Khaderbad, Keng-Chu Lin | 2022-10-18 |
| 11462471 | Middle-of-line interconnect structure and manufacturing method | Cheng-Wei Chang, Yi-Ying Liu, Chia-Hung Chu, Fang-Wei Lee | 2022-10-04 |
| 11424185 | Semiconductor device and manufacturing method thereof | Cheng-Wei Chang, Chia-Hung Chu, Kao-Feng Lin, Hsu-Kai Chang, Shuen-Shin Liang +6 more | 2022-08-23 |
| 11393924 | Structure and formation method of semiconductor device with high contact area | Shuen-Shin Liang, Pang-Yen Tsai, Keng-Chu Lin, Pinyen Lin | 2022-07-19 |
| 11362000 | Wrap-around contact on FinFET | Neng-Kuo Chen, Ding-Kang Shih, Meng-Chun Chang, Yi-An Lin, Gin-Chen Huang +5 more | 2022-06-14 |
| 11362212 | Contact interface engineering for reducing contact resistance | Mrunal A. Khaderbad, Keng-Chu Lin | 2022-06-14 |
| 11251086 | Semiconductor devices, FinFET devices, and manufacturing methods thereof | Chih-Sheng Chang, Sey-Ping Sun | 2022-02-15 |
| 11233134 | Field effect transistors with dual silicide contact structures | Peng-Wei Chu, Ding-Kang Shih, Yasutoshi Okuno | 2022-01-25 |
| 11227794 | Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure | Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal A. Khaderbad +1 more | 2022-01-18 |
| 11217524 | Interconnect structure and manufacturing method for the same | Shuen-Shin Liang, Ken-Yu Chang, Hung-Yi Huang, Chien-Kuo Chang, Chi-Hung Chuang +7 more | 2022-01-04 |
| 11211383 | Semiconductor device and manufacturing method thereof | Pang-Yen Tsai, Yasutoshi Okuno | 2021-12-28 |
| 11201232 | Semiconductor structure with metal containing layer | Mrunal A. Khaderbad, Yasutoshi Okuno | 2021-12-14 |
| 11177208 | Interconnect structures and methods of forming the same | Yasutoshi Okuno | 2021-11-16 |
| 11158539 | Method and structure for barrier-less plug | Hung-Yi Huang, Yu-Yun Peng, Mrunal A. Khaderbad, Chia-Hung Chu, Shuen-Shin Liang +1 more | 2021-10-26 |
| 11043570 | Semiconductor device and manufacturing method thereof | Yee-Chia Yeo, Chi On Chui, Jyh-Cherng Sheu, Hung-Li Chiang, I-Sheng Chen | 2021-06-22 |
| 11031300 | Semiconductor structure and method for manufacturing the same | Peng-Wei Chu, Yasutoshi Okuno | 2021-06-08 |
| 11018012 | Contact structures with deposited silicide layers | Yasutoshi Okuno, Shih-Chuan Chiu | 2021-05-25 |
| 11011413 | Interconnect structures and methods of forming the same | Shuen-Shin Liang, Jung-Hao Chang, Chia-Hung Chu, Keng-Chu Lin | 2021-05-18 |
| 10978354 | Selective dual silicide formation | Peng-Wei Chu, Yasutoshi Okuno | 2021-04-13 |