Issued Patents All Time
Showing 126–146 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6762629 | VCC adaptive dynamically variable frequency clock system for high performance low power microprocessors | Simon Tam | 2004-07-13 |
| 6753541 | Method and apparatus for making and using a beacon fiducial for an integrated circuit | Steve Seidel, Simon Tam, Valluri Rao, Richard H. Livengood | 2004-06-22 |
| 6707118 | Semiconductor-on-insulator resistor-capacitor circuit | Harry Muljono | 2004-03-16 |
| 6608528 | Adaptive variable frequency clock system for high performance low power microprocessors | Simon Tam | 2003-08-19 |
| 6596980 | Method and apparatus to measure statistical variation of electrical signal phase in integrated circuits using time-correlated photon counting | Harry Muljono, Gary Woods, Jeremy Rowlette, Dean J. Grannes | 2003-07-22 |
| 6524897 | Semiconductor-on-insulator resistor-capacitor circuit | Harry Muljono | 2003-02-25 |
| 6519744 | Semiconductor die manufacture method to limit a voltage drop on a power plane thereof by noninvasively measuring voltages on a power plane | Steven G. Seidel, Travis Eiles, Gary Woods, Dean J. Grannes | 2003-02-11 |
| 6507182 | Voltage modulator circuit to control light emission for non-invasive timing measurements | Harry Muljono | 2003-01-14 |
| 6366129 | Method and apparatus for buffering an input-output node of an integrated circuit | Kenneth Douglas, Harry Muljono | 2002-04-02 |
| 6201448 | Method and apparatus to reduce clock jitter of an on-chip clock signal | Simon Tam | 2001-03-13 |
| 6092212 | Method and apparatus for driving a strobe signal | Harry Muljono | 2000-07-18 |
| 6067656 | Method and apparatus for detecting soft errors in content addressable memory arrays | John Fu, Simon Tam | 2000-05-23 |
| 6044417 | System for controlling operational characteristics of buffer group where capture registers receive control signals in parallel and update registers transfer control signals to buffer group | Harry Muljono | 2000-03-28 |
| 5869983 | Method and apparatus for controlling compensated buffers | Alper Ilkbahar | 1999-02-09 |
| 5623420 | Method and apparatus to distribute spare cells within a standard cell region of an integrated circuit | Clayton L. Yee, Sandeep A. Aji | 1997-04-22 |
| 5598348 | Method and apparatus for analyzing the power network of a VLSI circuit | Clayton L. Yee | 1997-01-28 |
| 5598035 | Integrated circuit package with external storage capacitor for improved signal quality for sensitive integrated circuit elements | Clayton L. Yee, Deviprasad Malladi, Alan C. Rogers | 1997-01-28 |
| 5581473 | Method and apparatus for managing timing requirement specifications and confirmations and generating timing models and constraints for a VLSI circuit | Stuart A. Taylor, Peter C. Tong, Gregory T. Schulte | 1996-12-03 |
| 5307286 | Method for optimizing automatic place and route layout for full scan circuits | Joseph Yang | 1994-04-26 |
| 5208764 | Method for optimizing automatic place and route layout for full scan circuits | Joseph Yang | 1993-05-04 |
| 5109168 | Method and apparatus for the design and optimization of a balanced tree for clock distribution in computer integrated circuits | — | 1992-04-28 |