Issued Patents All Time
Showing 25 most recent of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9953697 | Volatile memory device employing a resistive memory element | Tanmay Kumar | 2018-04-24 |
| 8659028 | Three-dimensional memory device incorporating segmented array line memory array | Roy E. Scheuerlein, Luca Fasoli | 2014-02-25 |
| 8637870 | Three-dimensional memory device incorporating segmented array line memory array | Roy E. Scheuerlein, Luca Fasoli | 2014-01-28 |
| 8536015 | Memory cell that includes a carbon-based memory element and methods of forming the same | Roy E. Scheuerlein, April D. Schricker | 2013-09-17 |
| 8110476 | Memory cell that includes a carbon-based memory element and methods of forming the same | Roy E. Scheuerlein, April D. Shricker | 2012-02-07 |
| 8048474 | Method of making nonvolatile memory cell containing carbon resistivity switching as a storage element by low temperature processing | Tanmay Kumar, Er-Xuan Ping | 2011-11-01 |
| 7545689 | Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information | Derek Bosch | 2009-06-09 |
| 7505321 | Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same | Roy E. Scheuerlein, Christopher J. Petti, Andrew J. Walker, En-Hsing Chen, Sucheta Nallamothu +2 more | 2009-03-17 |
| 7433233 | NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same | En-Hsing Chen, Andrew J. Walker, Roy E. Scheuerlein, Sucheta Nallamothu, Luca Fasoli | 2008-10-07 |
| 7383476 | System architecture and method for three-dimensional memory | Matthew P. Crowley, Luca Fasoli, Mark G. Johnson, Bendik Kleveland, Thomas H. Lee +1 more | 2008-06-03 |
| 7277336 | Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information | Derek Bosch | 2007-10-02 |
| 7233024 | Three-dimensional memory device incorporating segmented bit line memory array | Roy E. Scheuerlein, Luca Fasoli | 2007-06-19 |
| 7233522 | NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same | En-Hsing Chen, Andrew J. Walker, Roy E. Scheuerlein, Sucheta Nallamothu, Luca Fasoli | 2007-06-19 |
| 7219271 | Memory device and method for redundancy/self-repair | Bendik Kleveland, Roy E. Scheuerlein | 2007-05-15 |
| 7132335 | Semiconductor device with localized charge storage dielectric and method of making same | Roy E. Scheuerlein, Andrew J. Walker, Luca Fasoli | 2006-11-07 |
| 7023739 | NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same | En-Hsing Chen, Andrew J. Walker, Roy E. Scheuerlein, Sucheta Nallamothu, Luca Fasoli | 2006-04-04 |
| 7005350 | Method for fabricating programmable memory array structures incorporating series-connected transistor strings | Andrew J. Walker, En-Hsing Chen, Sucheta Nallamothu, Roy E. Scheuerlein, Luca Fasoli +2 more | 2006-02-28 |
| 6996017 | Redundant memory structure using bad bit pointers | Roy E. Scheuerlein, Mark G. Johnson, Derek Bosch, J. James Tringali | 2006-02-07 |
| 6940109 | High density 3d rail stack arrays and method of making | Kedar Patel, Roy E. Scheuerlein, Andrew J. Walker | 2005-09-06 |
| 6928590 | Memory device and method for storing bits in non-adjacent storage locations in a memory array | Roy E. Scheuerlein, Derek Bosch | 2005-08-09 |
| 6898741 | Arrangements for self-measurement of I/O timing | Harry Muljono | 2005-05-24 |
| 6868022 | Redundant memory structure using bad bit pointers | Roy E. Scheuerlein, Mark G. Johnson, Derek Bosch, J. James Tringali | 2005-03-15 |
| 6849905 | Semiconductor device with localized charge storage dielectric and method of making same | Roy E. Scheuerlein, Andrew J. Walker, Luca Fasoli | 2005-02-01 |
| 6807119 | Array containing charge storage and dummy transistors and method of operating the array | Luca Fasoli, Roy E. Scheuerlein | 2004-10-19 |
| 6765813 | Integrated systems using vertically-stacked three-dimensional memory cells | Roy E. Scheuerlein, J. James Tringali, Colm P. Lysaght, Christopher S. Moore, David Friedman | 2004-07-20 |