Issued Patents All Time
Showing 176–200 of 235 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11456293 | Polysilicon resistor structures | Wen-Tuo Huang, Yong-Shiuan Tsair | 2022-09-27 |
| 11450660 | Semiconductor device and method of fabricating the same | Te-An Chen | 2022-09-20 |
| 11424339 | Integrated chip and method of forming thereof | Chia-En Huang | 2022-08-23 |
| 11423966 | Memory array staircase structure | Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin | 2022-08-23 |
| 11417739 | Contacts for semiconductor devices and methods of forming the same | Sai-Hooi Yeong, Chi On Chui | 2022-08-16 |
| 11404410 | Semiconductor device having different voltage regions | Te-An Chen | 2022-08-02 |
| 11404091 | Memory array word line routing | Chenchen Jacob Wang, Yi-Ching Liu, Han-Jong Chia, Sai-Hooi Yeong, Yu-Ming Lin +1 more | 2022-08-02 |
| 11404099 | Using split word lines and switches for reducing capacitive loading on a memory system | Sheng-Chen Wang, Chia-En Huang, Yi-Ching Liu | 2022-08-02 |
| 11380769 | Select gate spacer formation to facilitate embedding of split gate flash memory | Chih-Ren Hsieh | 2022-07-05 |
| 11355551 | Multi-level magnetic tunnel junction NOR device with wrap-around gate electrodes and methods for forming the same | Han-Jong Chia, Bo-Feng Young, Sai-Hooi Yeong, Chenchen Jacob Wang, Yu-Ming Lin | 2022-06-07 |
| 11355507 | Semiconductor device and manufacturing method thereof | Te-An Chen | 2022-06-07 |
| 11355516 | Three-dimensional memory device and method | Feng-Cheng Yang, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin | 2022-06-07 |
| 11349010 | Schottky barrier diode with reduced leakage current and method of forming the same | Te-An Chen | 2022-05-31 |
| 11342334 | Memory cell and method | Han-Jong Chia, Sai-Hooi Yeong, Chi On Chui, Yu-Ming Lin | 2022-05-24 |
| 11333827 | Protective ring structure to increase waveguide performance | Yung-Chang Chang | 2022-05-17 |
| 11264292 | Cell-like floating-gate test structure | Chih-Ren Hsieh, Ya-Chen Kao, Chen-Chin Liu, Chih-Pin Huang | 2022-03-01 |
| 11239246 | Cell boundary structure for embedded memory | Chih-Ren Hsieh, Wei-Cheng Wu, Chih-Pin Huang | 2022-02-01 |
| 11239089 | Semiconductor device and manufacturing method thereof | Chih-Ren Hsieh, Chih-Pin Huang, Ching-Wen Chan | 2022-02-01 |
| 11239313 | Integrated chip and method of forming thereof | Yong-Shiuan Tsair | 2022-02-01 |
| 11217597 | Semiconductor device and method of manufacturing the same | Chih-Ren Hsieh, Ching-Wen Chan | 2022-01-04 |
| 11217629 | Semiconductor device and manufacturing method thereof | Sai-Hooi Yeong, Yu-Ming Lin, Han-Jong Chia, Chenchen Jacob Wang | 2022-01-04 |
| 11211297 | Method for testing bridging in adjacent semiconductor devices and test structure | Chia-Lin LIANG, Chih-Ren Hsieh | 2021-12-28 |
| 11211388 | Array boundfary structure to reduce dishing | Te-Hsin Chiu, Wei-Cheng Wu, Li-Feng Teng, Chien-Hung Chang | 2021-12-28 |
| 11195834 | Semiconductor device having deep wells | Chih-Ren Hsieh, Chen-Chin Liu | 2021-12-07 |
| 11088040 | Cell-like floating-gate test structure | Chih-Ren Hsieh, Ya-Chen Kao, Chen-Chin Liu, Chih-Pin Huang | 2021-08-10 |