Issued Patents All Time
Showing 126–150 of 417 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996410 | Gap-insulated semiconductor device | Jung-Chien Cheng, Chih-Hao Wang, Guan-Lin Chen, Shi Ning Ju, Kuo-Cheng Chiang | 2024-05-28 |
| 11996409 | Stacking CMOS structure | Yu-Xuan Huang, Chia-En Huang, Ching-Wei Tsai | 2024-05-28 |
| 11996334 | Semiconductor device fabrication methods and structures thereof | Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu +1 more | 2024-05-28 |
| 11996293 | Method for metal gate cut and structure thereof | Pei-Yu Wang, Zhi-Chang Lin, Ching-Wei Tsai | 2024-05-28 |
| 11990529 | Air gap in inner spacers and methods of fabricating the same in field-effect transistors | Chien Ning Yao, Bo-Feng Young, Sai-Hooi Yeong, Chih-Hao Wang | 2024-05-21 |
| 11990374 | Method for forming sidewall spacers and semiconductor devices fabricated thereof | Kuan-Ting Pan, Kuo-Cheng Chiang, Shi Ning Ju, Yi-Ruei Jhan, Chih-Hao Wang | 2024-05-21 |
| 11984488 | Multigate device with air gap spacer and backside rail contact and method of fabricating thereof | Guan-Lin Chen, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2024-05-14 |
| 11978782 | Semiconductor device and method for making the same | Chi-Yi Chuang, Ching-Wei Tsai, Chih-Hao Wang | 2024-05-07 |
| 11973077 | Semiconductor device and manufacturing method thereof | Wang-Chun Huang, Hou-Yu Chen, Chih-Hao Wang | 2024-04-30 |
| 11961915 | Capacitance reduction for back-side power rail device | Shi Ning Ju, Chih-Hao Wang, Kuo-Cheng Chiang, Wen-Ting Lan | 2024-04-16 |
| 11961913 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang | 2024-04-16 |
| 11961900 | Integrated circuit with a fin and gate structure and method making the same | Kuo-Cheng Chiang, Teng-Chun Tsai, Chih-Hao Wang | 2024-04-16 |
| 11961897 | Negative capacitance transistor with external ferroelectric structure | Chi-Hsing Hsu, Sai-Hooi Yeong, Ching-Wei Tsai, Chih-Hao Wang, Min Cao | 2024-04-16 |
| 11961840 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang +1 more | 2024-04-16 |
| 11956938 | Semiconductor device and manufacturing method thereof | Tetsu Ohtou, Ching-Wei Tsai, Yasutoshi Okuno, Jiun-Jia Huang | 2024-04-09 |
| 11948972 | High-voltage nano-sheet transistor | Yu-Xuan Huang, Chia-En Huang, Ching-Wei Tsai, Yih Wang | 2024-04-02 |
| 11949001 | Multi-gate devices and fabricating the same with etch rate modulation | Chih-Ching Wang, Chung-I Yang, Jon-Hsu Ho, Wen-Hsing Hsieh, Chung-Wei Wu +1 more | 2024-04-02 |
| 11948839 | Power reduction in finFET structures | Kuo-Cheng Ching, Chih-Hao Wang | 2024-04-02 |
| 11948989 | Gate-all-around device with protective dielectric layer and method of forming the same | Cheng-Ting Chung, Yi-Bo Liao, Hou-Yu Chen | 2024-04-02 |
| 11948987 | Self-aligned backside source contact structure | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang +1 more | 2024-04-02 |
| 11948970 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2024-04-02 |
| 11948879 | Semiconductor device structure and methods of forming the same | Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang | 2024-04-02 |
| 11935921 | Dielectric structures for semiconductor devices | Kuo-Cheng Ching, Chih-Hao Wang | 2024-03-19 |
| 11923457 | FinFET structure with fin top hard mask and method of forming the same | Che-Yu Yang, Kai-Chieh Yang, Ching-Wei Tsai | 2024-03-05 |
| 11923361 | Semiconductor device with isolation structure | Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang | 2024-03-05 |