Issued Patents All Time
Showing 51–75 of 261 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12148700 | Semiconductor device, and associated method and system | Shih-Wei Peng, Wei-Cheng Lin | 2024-11-19 |
| 12142611 | Semiconductor structure for reducing stray capacitance and method of forming the same | Shih-Wei Peng, Wei-Cheng Lin | 2024-11-12 |
| 12142563 | Dual power structure with efficient layout | Shih-Wei Peng | 2024-11-12 |
| 12132049 | Integrated circuit device with high mobility and system of forming the integrated circuit | Kam-Tou Sio, Shang-Wei Fang, CHEW-YUEN YOUNG | 2024-10-29 |
| 12131998 | Integrated circuit, system and method of forming same | Te-Hsin Chiu, Kam-Tou Sio, Shih-Wei Peng, Wei-Cheng Lin | 2024-10-29 |
| 12113132 | Metal rail conductors for non-planar semiconductor devices | Chih-Liang Chen, Chih-Ming Lai, Ching-Wei Tsai, Charles Chew-Yuen Young, Kuo-Cheng Chiang +5 more | 2024-10-08 |
| 12113014 | Integrated circuit including supervia and method of making | Kam-Tou Sio, Wei-Cheng Lin | 2024-10-08 |
| 12107045 | Middle-end-of-line strap for standard cell | Meng-Hung Shen, Chih-Liang Chen, Charles Chew-Yuen Young, Kam-Tou Sio, Wei-Cheng Lin | 2024-10-01 |
| 12101922 | Memory device and layout, manufacturing method of the same | Te-Hsin Chiu, Shih-Wei Peng, Wei-An Lai | 2024-09-24 |
| 12094777 | Method for manufacturing semiconductor device | Shih-Wei Peng, Wei-Cheng Lin | 2024-09-17 |
| 12086524 | Semiconductor device having more similar cell densities in alternating rows | Wei-Cheng Lin, Hui-Ting Yang, Lipen Yuan, Wei-An Lai | 2024-09-10 |
| 12080588 | Buried metal for FinFET device and method | Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Ru-Gun Liu, Charles Chew-Yuen Young | 2024-09-03 |
| 12079559 | IC device layout method | Shih-Wei Peng, Guo-Huei Wu, Wei-Cheng Lin, Hui-Zhong Zhuang | 2024-09-03 |
| 12068305 | Multiple fin height integrated circuit | Wei-Cheng Lin, Hui-Ting Yang, Lipen Yuan, Wei-An Lai | 2024-08-20 |
| 12067341 | Semiconductor structure, device, and method | Shih-Wei Peng, Wei-Cheng Lin | 2024-08-20 |
| 12061856 | Semiconductor device including combination rows and method and system for generating layout diagram of same | Shih-Wei Peng | 2024-08-13 |
| 12039246 | Circuit layout | Shih-Wei Peng, Kam-Tou Sio | 2024-07-16 |
| 12034076 | Semiconductor device integrating backside power grid and related integrated circuit and fabrication method | Chih-Liang Chen, Lei-Chun Chou, Jack Liu, Kam-Tou Sio, Hui-Ting Yang +3 more | 2024-07-09 |
| 12021083 | Fin field-effect transistor and method of forming the same | Te-Hsin Chiu, Kam-Tou Sio | 2024-06-25 |
| 12021021 | Integrated circuit structure | Te-Hsin Chiu, Shih-Wei Peng, Wei-Cheng Lin | 2024-06-25 |
| 12009364 | Semiconductor device and manufacture thereof | Te-Hsin Chiu, Shih-Wei Peng, Meng-Hung Shen | 2024-06-11 |
| 12003242 | Integrated circuit having latch with transistors of different gate widths | Ching-Yu Huang, Wei-Cheng Lin | 2024-06-04 |
| 11990477 | Hybrid fin field-effect transistor cell structures and related methods | Wei-An Lai, Hui-Zhong Zhuang, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen | 2024-05-21 |
| 11984443 | Power distribution network | Kam-Tou Sio, Wei-Cheng Lin | 2024-05-14 |
| 11984441 | Integrated circuit with backside power rail and backside interconnect | Shih-Wei Peng, Guo-Huei Wu | 2024-05-14 |