Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12414344 | Semiconductor device having active regions of different dimensions and method of manufacturing the same | Wei-Cheng TZENG, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-09-09 |
| 12388428 | Integrated circuit having latch with transistors of different gate widths | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2025-08-12 |
| 12314650 | Integrated circuit device and manufacturing method of the same | Wei-Cheng TZENG, Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-05-27 |
| 12265775 | Semiconductor device with reduced power | Shih-Wei Peng, Jiann-Tyng Tzeng | 2025-04-01 |
| 12261116 | Backside signal routing | Wei-Cheng Lin, Shih-Wei Peng, Jiann-Tyng Tzeng, Yi-Kan Cheng | 2025-03-25 |
| 12261036 | Forming low-stress silicon nitride layer through hydrogen treatment | Wei-Che Hsieh, Hsin-Hao Yeh, Chunyao Wang, Tze-Liang Lee | 2025-03-25 |
| 12205888 | Semiconductor packages and methods of forming the same | Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang +1 more | 2025-01-21 |
| 12148735 | Memory device and manufacturing method thereof | Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang +1 more | 2024-11-19 |
| 12125911 | Method of modulating stress of dielectric layers | Chung-Ting Ko, Han-Chi Lin, Chunyao Wang, Tze-Liang Lee, Yung-Chih Wang | 2024-10-22 |
| 12003242 | Integrated circuit having latch with transistors of different gate widths | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2024-06-04 |
| 11929319 | Integrated fan-out packages and methods of forming the same | Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang +1 more | 2024-03-12 |
| 11830727 | Forming low-stress silicon nitride layer through hydrogen treatment | Wei-Che Hsieh, Hsin-Hao Yeh, Chunyao Wang, Tze-Liang Lee | 2023-11-28 |
| 11797745 | Semiconductor device with reduced power and method of manufacturing the same | Shih-Wei Peng, Jiann-Tyng Tzeng | 2023-10-24 |
| 11502196 | Stress modulation for dielectric layers | Chung-Ting Ko, Han-Chi Lin, Chunyao Wang, Tze-Liang Lee, Yung-Chih Wang | 2022-11-15 |
| 11393674 | Forming low-stress silicon nitride layer through hydrogen treatment | Wei-Che Hsieh, Hsin-Hao Yeh, Chunyao Wang, Tze-Liang Lee | 2022-07-19 |
| 11335666 | Memory device and manufacturing method thereof | Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang +1 more | 2022-05-17 |
| 11075159 | Integrated fan-out packages and methods of forming the same | Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang +1 more | 2021-07-27 |
| 10879170 | Semiconductor package and manufacturing method thereof | Yung-Ping Chiang, Chung-Shi Liu, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko +2 more | 2020-12-29 |
| 10870702 | Methods of assessing and treating cancer in subjects having dysregulated lymphatic systems | Michael Kuo | 2020-12-22 |
| 10868131 | Gaseous spacer and methods of forming same | Hsin-Hao Yeh | 2020-12-15 |
| 10720526 | Stress modulation for dielectric layers | Chung-Ting Ko, Han-Chi Lin, Chunyao Wang, Tze-Liang Lee, Yung-Chih Wang | 2020-07-21 |
| 10510861 | Gaseous spacer and methods of forming same | Hsin-Hao Yeh | 2019-12-17 |
| 10159444 | Method and system for anaerobic threshold heart rate detection | Hsing-Chen Lin, Jong-Shyan Wang, Chi-Hsiang Weng, Wen-Chung Hsueh | 2018-12-25 |
| 10120453 | Method for controlling electronic equipment and wearable device | Wen-Chung Hsueh, Hsing-Chen Lin, Bo Wu, Chi-Hsiang Weng | 2018-11-06 |
| 7626240 | Electro-optical apparatus and a circuit bonding detection device and detection method thereof | Ying-Hung Tsai, Shih-Ping Chou | 2009-12-01 |