Issued Patents All Time
Showing 51–75 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9875789 | 3D structure for advanced SRAM design to avoid half-selected issue | Chien-Yuan Chen, Chien-Yu Huang | 2018-01-23 |
| 9865335 | SRAM device capable of working in multiple low voltages without loss of performance | Pankaj Aggarwal, Jui-Che Tsai, Cheng Hung Lee, Chien-Yuan Chen, Chiting Cheng +1 more | 2018-01-09 |
| 9858987 | Sense amplifier scheme | Chien-Yuan Chen | 2018-01-02 |
| 9654146 | Bi-directional parity bit generator circuit | Yi-Tzu Chen, Chien-Yuan Chen | 2017-05-16 |
| 9583181 | SRAM device capable of working in multiple low voltages without loss of performance | Pankaj Aggarwal, Jui-Che Tsai, Cheng Hung Lee, Chien-Yuan Chen, Chiting Cheng +1 more | 2017-02-28 |
| 9558791 | Three-dimensional static random access memory device structures | Chien-Yu Huang, Chien-Yuan Chen | 2017-01-31 |
| 9501079 | Data retention voltage clamp | Chien-Yuan Chen | 2016-11-22 |
| 9330731 | Circuits in strap cell regions | Hua-Hsin Yu, Hsiu Fen Peng | 2016-05-03 |
| 9299420 | Data-aware SRAM systems and methods forming same | Chien-Yuan Chen, Yi-Tzu Chen, Tsung-Yung Chang | 2016-03-29 |
| 9275721 | Split bit line architecture circuits and methods for memory devices | Yi-Tzu Chen, Bin-Hau Lo, Tsai-Hsin Lai, Pey-Huey Chen | 2016-03-01 |
| 9208857 | SRAM multiplexing apparatus | Yi-Tzu Chen, Wei-jer Hsieh, Tsai-Hsin Lai, Ling-Fang Hsu | 2015-12-08 |
| 9058899 | Data-aware SRAM systems and methods forming same | Chien-Yuan Chen, Yi-Tzu Chen, Tsung-Yung Chang | 2015-06-16 |
| 9042193 | Sense amplifier scheme | Chien-Yuan Chen | 2015-05-26 |
| 9007851 | Memory read techniques using Miller capacitance decoupling circuit | Chien-Yuan Chen, Yi-Tzu Chen, Hong-Chen Cheng | 2015-04-14 |
| 9001546 | 3D structure for advanced SRAM design to avoid half-selected issue | Chien-Yuan Chen, Chien-Yu Huang | 2015-04-07 |
| 8964454 | Three-dimensional static random access memory cell | Chien-Yu Huang, Chien-Yuan Chen | 2015-02-24 |
| 8947953 | Bit cell internal voltage control | Wei Min Chan, Yi-Tzu Chen, Wei-Cheng Wu, Yen-Huei Chen | 2015-02-03 |
| 8866260 | MIM decoupling capacitors under a contact pad | Chen-Hui Hsieh | 2014-10-21 |
| 8750053 | SRAM multiplexing apparatus | Yi-Tzu Chen, Wei-jer Hsieh, Tsai-Hsin Lai, Ling-Fang Hsu | 2014-06-10 |
| 8587992 | Data-aware SRAM systems and methods forming same | Chien-Yuan Chen, Yi-Tzu Chen, Tsung-Yung Chang | 2013-11-19 |
| 8576642 | Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices | Bin-Hau Lo, Yi-Tzu Chen, C. K. Su | 2013-11-05 |
| 8451671 | Multiplexing circuit for high-speed, low leakage, column-multiplexing memory devices | Bin-Hau Lo, Yi-Tzu Chen, C. K. Su | 2013-05-28 |
| 7855932 | Low power word line control circuits with boosted voltage output for semiconductor memory | Chung-Cheng Chou, Chien-Hua Huang, Tsai-Hsin Lai | 2010-12-21 |
| 7212939 | Method and system for timing measurement of embedded macro module | Chen-Hui Hsieh, Tao Wang | 2007-05-01 |
| 7020038 | Efficient refresh operation for semiconductor memory devices | — | 2006-03-28 |