DS

Dongna Shen

TSMC: 45 patents #736 of 12,232Top 7%
HT Headway Technologies: 17 patents #61 of 309Top 20%
📍 San Jose, CA: #657 of 32,062 inventorsTop 3%
🗺 California: #5,467 of 386,348 inventorsTop 2%
Overall (All Time): #36,233 of 4,157,543Top 1%
62
Patents All Time

Issued Patents All Time

Showing 1–25 of 62 patents

Patent #TitleCo-InventorsDate
12414479 Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode Yi Yang, Yu-Jen Wang 2025-09-09
12310245 Etching and encapsulation scheme for magnetic tunnel junction fabrication Vignesh Sundar, Yi Yang, Zhongjian Teng, Jesmin Haq, Sahil Patel +2 more 2025-05-20
12245516 Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive re-deposition Yi Yang, Vignesh Sundar, Yu-Jen Wang 2025-03-04
12207567 Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process Yi Yang, Yu-Jen Wang 2025-01-21
12185641 Silicon oxynitride based encapsulation layer for magnetic tunnel junctions Vignesh Sundar, Yu-Jen Wang, Sahil Patel, Ru-Ying Tong 2024-12-31
11985905 Highly physical ion resistive spacer to define chemical damage free sub 60nm MRAM devices Yi Yang, Yu-Jen Wang 2024-05-14
11930715 Highly physical etch resistive photoresist mask to define large height sub 30nm via and metal hard mask for MRAM devices Yi Yang, Yu-Jen Wang 2024-03-12
11903324 Post treatment to reduce shunting devices for physical etching process Yu-Jen Wang, Vignesh Sundar, Sahil Patel 2024-02-13
11895928 Integration scheme for three terminal spin-orbit-torque (SOT) switching devices Jesmin Haq, Tom Zhong, Luc Thomas, Zhongjian Teng 2024-02-06
11856864 Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode Yi Yang, Yu-Jen Wang 2023-12-26
11818961 Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive re-deposition Yi Yang, Vignesh Sundar, Yu-Jen Wang 2023-11-14
11800811 MTJ CD variation by HM trimming Yi Yang, Jesmin Haq, Yu-Jen Wang 2023-10-24
11785863 Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process Yi Yang, Yu-Jen Wang 2023-10-10
11696511 Low resistance MgO capping layer for perpendicularly magnetized magnetic tunnel junctions Sahil Patel, Guenole Jan, Ru-Ying Tong, Vignesh Sundar, Yu-Jen Wang +2 more 2023-07-04
11631802 Etching and encapsulation scheme for magnetic tunnel junction fabrication Vignesh Sundar, Yi Yang, Zhongjian Teng, Jesmin Haq, Sahil Patel +2 more 2023-04-18
11563171 Highly physical ion resistive spacer to define chemical damage free sub 60 nm MRAM devices Yi Yang, Yu-Jen Wang 2023-01-24
11444241 Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive R-deposition Yi Yang, Vignesh Sundar, Yu-Jen Wang 2022-09-13
11430947 Sub 60nm etchless MRAM devices by ion beam etching fabricated t-shaped bottom electrode Yi Yang, Yu-Jen Wang 2022-08-30
11424405 Post treatment to reduce shunting devices for physical etching process Yu-Jen Wang, Vignesh Sundar, Sahil Patel 2022-08-23
11411174 Silicon oxynitride based encapsulation layer for magnetic tunnel junctions Vignesh Sundar, Yu-Jen Wang, Sahil Patel, Ru-Ying Tong 2022-08-09
11316103 Combined physical and chemical etch to reduce magnetic tunnel junction (MTJ) sidewall damage Yu-Jen Wang, Ru-Ying Tong, Vignesh Sundar, Sahil Patel 2022-04-26
11289645 Method to integrate MRAM devices to the interconnects of 30nm and beyond CMOS technologies Yi Yang, Vignesh Sundar, Sahil Patel, Ru-Ying Tong, Yu-Jen Wang 2022-03-29
11217746 Ion beam etching fabricated sub 30nm Vias to reduce conductive material re-deposition for sub 60nm MRAM devices Yi Yang, Zhongjian Teng, Jesmin Haq, Yu-Jen Wang 2022-01-04
11145809 Multiple spacer assisted physical etching of sub 60nm MRAM devices Yi Yang, Yu-Jen Wang 2021-10-12
11121314 Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices Yi Yang, Yu-Jen Wang 2021-09-14