Issued Patents All Time
Showing 26–50 of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11837505 | Formation of hybrid isolation regions through recess and re-deposition | Chi On Chui | 2023-12-05 |
| 11830736 | Multi-layer photo etching mask including organic and inorganic materials | Tai-Chun Huang, Chi On Chui | 2023-11-28 |
| 11810824 | Semiconductor device and manufacturing method thereof | Sung-En Lin, Chi On Chui | 2023-11-07 |
| 11728173 | Masking layer with post treatment | Wen-Ju Chen, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui | 2023-08-15 |
| 11725278 | Systems and methods for a plasma enhanced deposition of material on a semiconductor substrate | Kun-Mo Lin, Yi-Hung Lin, Jr-Hung Li, Tze-Liang Lee, Ting-Gang Chen | 2023-08-15 |
| 11600530 | Semiconductor device and method of manufacture | Chun-Yi Lee, Hong-Hsien Ke, Chia-Hui Lin, Jr-Hung Li | 2023-03-07 |
| 11532628 | Semiconductor device and method | Li-Fong Lin, Wan-Chen Hsieh, Tai-Chun Huang | 2022-12-20 |
| 11530479 | Atomic layer deposition tool and method | Wen-Ju Chen, Wan-Chen Hsieh, Ming-Fa Wu, Tai-Chun Huang, Yung-Cheng Lu +1 more | 2022-12-20 |
| 11532475 | Deposition process for forming semiconductor device and system | Chi On Chui | 2022-12-20 |
| 11532507 | Semiconductor device and method | Chun-Han Chen, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang +2 more | 2022-12-20 |
| 11532733 | Dielectric isolation structure for multi-gate transistors | Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao +4 more | 2022-12-20 |
| 11502196 | Stress modulation for dielectric layers | Han-Chi Lin, Chunyao Wang, Ching-Yu Huang, Tze-Liang Lee, Yung-Chih Wang | 2022-11-15 |
| 11441221 | Method of performing atomic layer deposition | Po-Hsien Cheng, Tsung-Hsun Yu, Tze-Liang Lee, Chi On Chui | 2022-09-13 |
| 11437277 | Forming isolation regions for separating fins and gate stacks | Tai-Chun Huang, Jr-Hung Li, Tze-Liang Lee, Chi On Chui | 2022-09-06 |
| 11417748 | Semiconductor device and method of fabricating a semiconductor device | Bi-Fen Wu, Chi On Chui | 2022-08-16 |
| 11404323 | Formation of hybrid isolation regions through recess and re-deposition | Chi On Chui | 2022-08-02 |
| 11362003 | Prevention of contact bottom void in semiconductor fabrication | Yun Lee, Chen-Ming Lee, Mei-Yun Wang, Fu-Kai Yang | 2022-06-14 |
| 11316047 | Structure and formation method of semiconductor device with monoatomic etch stop layer | Bo-Cyuan Lu, Jr-Hung Li, Chi On Chui | 2022-04-26 |
| 11296198 | Semiconductor structure with barrier layer and method for forming the same | Shih-Wen Huang, Hong-Hsien Ke, Chia-Hui Lin, Tai-Chun Huang | 2022-04-05 |
| 11271083 | Semiconductor device, FinFET device and methods of forming the same | Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Jr-Yu Chen +1 more | 2022-03-08 |
| 11145746 | Semiconductor device and method | Wen-Ju Chen, Chi On Chui | 2021-10-12 |
| 10943818 | Semiconductor device and method | Chun-Han Chen, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang +2 more | 2021-03-09 |
| 10854521 | Low-k gate spacer and formation thereof | Bo-Cyuan Lu, Chunyao Wang, Jr-Hung Li, Chi On Chui | 2020-12-01 |
| 10840357 | FinFET device and method of forming same | Bo-Cyuan Lu, Jr-Hung Li, Chi On Chui | 2020-11-17 |
| 10825737 | Prevention of contact bottom void in semiconductor fabrication | Yun Lee, Chen-Ming Lee, Mei-Yun Wang, Fu-Kai Yang | 2020-11-03 |