Issued Patents All Time
Showing 151–175 of 263 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11038058 | Semiconductor device structure and method for forming the same | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2021-06-15 |
| 11031418 | Integrated circuit structure and method with hybrid orientation for FinFET | Tzer-Min Shen, Zhiqiang Wu, Chung-Cheng Wu, Kuan-Lun Cheng, Chih-Hao Wang +1 more | 2021-06-08 |
| 11031292 | Multi-gate device and related methods | Shi Ning Ju, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang | 2021-06-08 |
| 11031298 | Semiconductor device and method | Yi-Bo Liao, Kai-Chieh Yang, Kuan-Lun Cheng | 2021-06-08 |
| 11031395 | Method of forming high performance MOSFETs having varying channel structures | Tetsu Ohtou, Jiun-Jia Huang, Kuan-Lun Cheng, Chi-Hsing Hsu | 2021-06-08 |
| 11024650 | FinFET device and a method for fabricating the same | Wang-Chun Huang, Kai-Chieh Yang, Kuan-Lun Chen, Chih-Hao Wang | 2021-06-01 |
| 11001885 | Apparatus for single molecular sequencing and method of sequencing nucleic acid molecules | Chung-Fan Chiou, Chao-Chi Pan, Bor-Huah Chen, Jian-Hao Ciou | 2021-05-11 |
| 10971609 | Back end of line nanowire power switch transistors | Li-Yang Chuang, Wang-Chun Huang, Kuan-Lun Cheng | 2021-04-06 |
| 10971406 | Method of forming source/drain regions of transistors | Yu-Hung Cheng, Yeur-Luen Tu, Tung-I Lin, Wei-Li Chen | 2021-04-06 |
| 10964816 | Method and device for boosting performance of FinFETs via strained spacer | Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Wei Ju Lee, Kuan-Lun Cheng | 2021-03-30 |
| 10943925 | Method of forming FinFET channel and structures thereof | Chih-Hao Wang, Kuo-Cheng Ching, Jhon Jhy Liaw, Wai-Yi Lien | 2021-03-09 |
| 10930569 | Dual crystal orientation for semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Lun Cheng | 2021-02-23 |
| 10910375 | Semiconductor device and method of fabrication thereof | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2021-02-02 |
| 10875023 | Oriented loading systems and method for orienting a particle loaded in a well | Hsin-Yi Hsieh, Yu-Hsuan PENG, Wen-Yih Chen, Chun-Jen Huang | 2020-12-29 |
| 10879242 | Method of manufacturing semiconductor device on hybrid substrate | Kuo-Cheng Ching, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-29 |
| 10879379 | Multi-gate device and related methods | Cheng-Ting Chung, Kuan-Lun Cheng | 2020-12-29 |
| 10868015 | Hybrid scheme for improved performance for P-type and N-type FinFETs | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-15 |
| 10868014 | Hybrid scheme for improved performance for P-type and N-type FinFETs | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-15 |
| 10868150 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Chiang, Chi-Wen Liu, Ying-Keung Leung | 2020-12-15 |
| 10868182 | Field effect transistor and manufacturing method thereof | Yu-Xuan Huang, Kuan-Lun Cheng | 2020-12-15 |
| 10861952 | Methods of manufacturing gate-all-around (GAA) FETs through partial replacement of gate spacers | Kuo-Cheng Ching, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-08 |
| 10861958 | Integrated circuits with gate stacks | Kuan-Lun Cheng, Li-Shyue Lai, Kai-Chieh Yang | 2020-12-08 |
| 10861973 | Negative capacitance transistor with a diffusion blocking layer | Chi-Hsing Hsu, Kuan-Lun Cheng, Chih-Hao Wang, Sai-Hooi Yeong | 2020-12-08 |
| 10763365 | Metal rail conductors for non-planar semiconductor devices | Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Kuo-Cheng Ching +5 more | 2020-09-01 |
| 10741672 | Gate structure for semiconductor device | Kuo-Cheng Ching, Chih-Hao Wang, Kuan-Lun Cheng | 2020-08-11 |