Issued Patents All Time
Showing 801–825 of 937 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109721 | Horizontal gate-all-around device having wrapped-around source and drain | Chun-Hsiung Lin, Chung-Cheng Wu, Carlos H. Diaz, Wen-Hsing Hsieh, Yi-Ming Sheu | 2018-10-23 |
| 10096706 | Vertical device architecture | Jhon Jhy Liaw, Wai-Yi Lien, Jia-Chuan You, Yi-Hsun Chiu, Ching-Wei Tsai +1 more | 2018-10-09 |
| 10096693 | Method for manufacturing semiconductor structure with multi spacers | Kuo-Cheng Ching, Ching-Wei Tsai, Ying-Keung Leung | 2018-10-09 |
| 10096597 | Re-grown gate structure and fabrication method thereof | Yu-Xuan Huang, Ching-Wei Tsai, Chung-Cheng Wu, Guo-Yung Chen, Yi-Hsiung Lin +2 more | 2018-10-09 |
| 10083869 | Stacked device and associated layout structure | Ta-Pen Guo, Carlos H. Diaz, Jean-Pierre Colinge | 2018-09-25 |
| 10074668 | Input/output (I/O) devices with greater source/drain proximity than non-I/O devices | Kuo-Cheng Ching, Ching-Wei Tsai, Ying-Keung Leung | 2018-09-11 |
| 10056473 | Semiconductor device and manufacturing method thereof | Wai-Yi Lien, Gwan Sin Chang, Yu-Ming Lin, Ching Hsueh, Jia-Chuan You +1 more | 2018-08-21 |
| 10026737 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Chih-Liang Chen, Shi Ning Ju | 2018-07-17 |
| 10008414 | System and method for widening Fin widths for small pitch FinFET devices | Kuo-Cheng Ching, Shi Ning Ju, Ying-Keung Leung, Carlos H. Diaz | 2018-06-26 |
| 10002796 | Dual epitaxial growth process for semiconductor device | Huan-Chieh Su, Jui-Chien Huang, Chun-Hsiung Lin | 2018-06-19 |
| 9991388 | FINFETs with wrap-around silicide and method forming the same | Kuo-Cheng Ching, Ching-Wei Tsai, Chi-Wen Liu, Ying-Keung Leung | 2018-06-05 |
| 9991262 | Semiconductor device on hybrid substrate and method of manufacturing the same | Kuo-Cheng Ching, Ching-Wei Tsai, Kuan-Lun Cheng | 2018-06-05 |
| 9985026 | Transistor, integrated circuit and method of fabricating the same | Chia-Hao Chang, Ming-Shan Shieh, Cheng-Long Chen, Wai-Yi Lien | 2018-05-29 |
| 9960273 | Integrated circuit structure with substrate isolation and un-doped channel | Kuo-Cheng Ching, Ching-Wei Tsai, Chung-Cheng Wu, Wen-Hsing Hsieh, Ying-Keung Leung | 2018-05-01 |
| 9960085 | Multiple patterning techniques for metal gate | Hsiang-Pi Chang, Wei-Hao Wu, Hung-Chang Sun, Lung-Kun Chu | 2018-05-01 |
| 9947773 | Semiconductor arrangement with substrate isolation | Kuo-Cheng Ching, Ching-Wei Tsai, Carlos H. Diaz | 2018-04-17 |
| 9941404 | Tuning strain in semiconductor devices | Jean-Pierre Colinge, Kuo-Cheng Ching, Gwan Sin Chang, Zhiqiang Wu, Carlos H. Diaz | 2018-04-10 |
| 9941279 | Semiconductor structure having fins and method for manufacturing the same | Kuo-Cheng Ching, Shi Ning Ju, Ying-Keung Leung, Carlos H. Diaz | 2018-04-10 |
| 9941374 | Contacts for highly scaled transistors | Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Jean-Pierre Colinge, Chun-Hsiung Lin +2 more | 2018-04-10 |
| 9935199 | FinFET with source/drain structure | Kuo-Cheng Ching, Ching-Wei Tsai, Ying-Keung Leung | 2018-04-03 |
| 9929269 | FinFET having an oxide region in the source/drain region | Kuo-Cheng Ching, Ching-Wei Tsai, Zhiqiang Wu, Jean-Pierre Colinge | 2018-03-27 |
| 9929245 | Semiconductor structures and methods for multi-level work function | Jean-Pierre Colinge, Chia-Wen Liu, Wei-Hao Wu, Carlos H. Diaz | 2018-03-27 |
| 9911824 | Semiconductor structure with multi spacer | Kuo-Cheng Ching, Ching-Wei Tsai, Ying-Keung Leung | 2018-03-06 |
| 9911848 | Vertical transistor and method of manufacturing the same | Carlos H. Diaz, Wai-Yi Lien, Kai-Chieh Yang, Hao Tang | 2018-03-06 |
| 9911855 | Top metal pads as local interconnectors of vertical transistors | Wai-Yi Lien, Yi-Hsun Chiu, Jia-Chuan You, Yu-Xuan Huang | 2018-03-06 |