KY

Kyoji Yamashita

Sumitomo Electric Industries: 17 patents #1,358 of 21,551Top 7%
KT Kabushiki Kaisha Toshiba: 17 patents #1,863 of 21,451Top 9%
PA Panasonic: 7 patents #3,841 of 21,108Top 20%
AT Advanced Mask Inspection Technology: 3 patents #4 of 16Top 25%
RT Renesas Technology: 3 patents #990 of 3,337Top 30%
NE Nec: 2 patents #5,510 of 14,502Top 40%
TC Toshiba Machine Co.: 1 patents #70 of 186Top 40%
TO Topcon: 1 patents #425 of 684Top 65%
Overall (All Time): #71,059 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 26–43 of 43 patents

Patent #TitleCo-InventorsDate
6709950 Semiconductor device and method of manufacturing the same Mizuki Segawa, Isao Miyanaga, Toshiki Yabu, Takashi Nakabayashi, Takashi Uehara +4 more 2004-03-23
6594598 Method for controlling production line Hiroaki Ishizuka 2003-07-15
6492672 Semiconductor device Mizuki Segawa, Toshiki Yabu, Takashi Uehara, Takashi Nakabayashi, Takaaki Ukeda +2 more 2002-12-10
6396943 Defect inspection method and defect inspection apparatus 2002-05-28
6281562 Semiconductor device which reduces the minimum distance requirements between active areas Mizuki Segawa, Isao Miyanaga, Toshiki Yabu, Takashi Nakabayashi, Takashi Uehara +4 more 2001-08-28
6205570 Method for designing LSI circuit pattern 2001-03-20
6124160 Semiconductor device and method for manufacturing the same Mizuki Segawa, Toshiki Yabu, Takashi Uehara, Takashi Nakabayashi, Takaaki Ukeda +2 more 2000-09-26
6084716 Optical substrate inspection apparatus Yasushi Sanada, Toru Tojo, Mitsuo Tabata, Hideo Nagai, Noboru Kobayashi +3 more 2000-07-04
5879983 Semiconductor device and method for manufacturing the same Mizuki Segawa, Toshiki Yabu, Takashi Uehara, Takashi Nakabayashi, Takaaki Ukeda +2 more 1999-03-09
5856754 Semiconductor integrated circuit with parallel/serial/parallel conversion 1999-01-05
5844809 Method and apparatus for generating two-dimensional circuit pattern 1998-12-01
5841173 MOS semiconductor device with excellent drain current 1998-11-24
5675168 Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device Shinji Odanaka, Kazumi Kurimoto, Akira Hiroki, Isao Miyanaga, Atsushi Hori 1997-10-07
5610430 Semiconductor device having reduced gate overlapping capacitance Shinji Odanaka, Kazumi Kurimoto, Hiroyuki Umimoto 1997-03-11
5404410 Method and system for generating a bit pattern Toru Tojo, Hideo Tsuchiya, Mitsuo Tabata, Ryoichi Yoshikawa 1995-04-04
5185812 Optical pattern inspection system Ryoichi Yoshikawa, Masakazu Tokita 1993-02-09
5100234 Method and apparatus for aligning two objects, and method and apparatus for providing a desired gap between two objects Yoriyuki Ishibashi, Ryoichi Hirano 1992-03-31
4988197 Method and apparatus for aligning two objects, and method and apparatus for providing a desired gap between two objects Yoriyuki Ishibashi, Ryoichi Hirano 1991-01-29