WB

William F. Burghout

ON onsemi: 9 patents #171 of 1,901Top 9%
Overall (All Time): #571,881 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9847219 Semiconductor die singulation method Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder, Gordon M. Grivna 2017-12-19
9484210 Semiconductor die singulation method Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder, Gordon M. Grivna 2016-11-01
9337098 Semiconductor die back layer separation method Michael J. Seddon 2016-05-10
9034733 Semiconductor die singulation method Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder, Gordon M. Grivna 2015-05-19
8664089 Semiconductor die singulation method Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder 2014-03-04
8319323 Electronic package having down-set leads and method James P. Letterman, Jr., Joseph K. Fauty, Jay A. Yoder 2012-11-27
7820528 Method of forming a leaded molded array package Francis J. Carney, Joseph K. Fauty, James P. Letterman, Jr., Jay A. Yoder 2010-10-26
7588999 Method of forming a leaded molded array package Francis J. Carney, Joseph K. Fauty, James P. Letterman, Jr., Jay A. Yoder 2009-09-15
6081031 Semiconductor package consisting of multiple conductive layers James P. Letterman, Jr., Albert J. Laninga, James H. Knapp, Joseph K. Fauty 2000-06-27