Issued Patents All Time
Showing 476–500 of 739 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9274892 | Memory chip with error detection and retry modes of operation | Ely Tsern, Mark A. Horowitz | 2016-03-01 |
| 9262342 | Process authenticated memory page encryption | Trung Diep, Pradeep Batra, Brian S. Leibowitz | 2016-02-16 |
| 9262269 | System and module comprising an electrically erasable programmable memory chip | Yuanlong Wang | 2016-02-16 |
| 9262262 | Memory device with retransmission upon error | Yuanlong Wang | 2016-02-16 |
| 9257151 | Printed-circuit board supporting memory systems with multiple data-bus configurations | Richard E. Perego, Donald C. Stark, Ely Tsern, Craig E. Hampel | 2016-02-09 |
| 9257159 | Low power memory device | Ely Tsern, Craig E. Hampel | 2016-02-09 |
| 9257163 | Strobe acquisition and tracking | Bret G. Stott, Ian Shaeffer, Yuanlong Wang | 2016-02-09 |
| 9256557 | Memory controller for selective rank or subrank access | Craig E. Hampel | 2016-02-09 |
| 9229470 | Memory controller with clock-to-strobe skew compensation | — | 2016-01-05 |
| 9230641 | Fast read speed memory device | Deepak C. Sekar, Gary B. Bronner | 2016-01-05 |
| 9232651 | Load reduced memory module | Suresh Rajan | 2016-01-05 |
| 9229523 | Memory controller with transaction-queue-dependent power modes | Robert E. Palmer, John W. Poulton, Andrew M. Fuller | 2016-01-05 |
| 9219509 | System performance improvement using data reordering and/or inversion | — | 2015-12-22 |
| 9213054 | Methods and apparatus for testing inaccessible interface circuits in a semiconductor device | — | 2015-12-15 |
| 9213591 | Electrically erasable programmable memory device that generates a cyclic redundancy check (CRC) code | Yuanlong Wang | 2015-12-15 |
| 9208836 | Chip-to-chip signaling with improved bandwidth utilization | — | 2015-12-08 |
| 9196348 | Maintenance operations in a DRAM | Robert E. Palmer, John W. Poulton | 2015-11-24 |
| 9183920 | High capacity memory system using standard controller component | Suresh Rajan, Scott C. Best | 2015-11-10 |
| 9176903 | Memory access during memory calibration | Ian Shaeffer | 2015-11-03 |
| 9165639 | High capacity memory system using standard controller component | Suresh Rajan, Scott C. Best | 2015-10-20 |
| 9160466 | Periodic calibration for communication channels by drift tracking | Craig E. Hampel, Richard E. Perego | 2015-10-13 |
| 9152585 | Memory interface with reduced read-write turnaround delay | — | 2015-10-06 |
| 9142262 | Stacked semiconductor device | — | 2015-09-22 |
| 9141479 | Memory system with error detection and retry modes of operation | Ely Tsern, Mark A. Horowitz | 2015-09-22 |
| 9123433 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern | 2015-09-01 |