Issued Patents All Time
Showing 526–550 of 739 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8880818 | Reconfigurable memory controller | John Eric Linstadt, Venu Madhav Kuchibholta | 2014-11-04 |
| 8868873 | Reconfigurable memory system data strobes | Ian Shaeffer, Craig E. Hampel | 2014-10-21 |
| 8842492 | Memory components and controllers that utilize multiphase synchronous timing references | Ian Shaeffer, Scott C. Best | 2014-09-23 |
| 8824224 | Frequency-agile strobe window generation | Brian S. Leibowitz, Ely Tsern | 2014-09-02 |
| 8824222 | Fast-wake memory | Jared L. Zerbe, Brian S. Leibowitz | 2014-09-02 |
| 8804394 | Stacked memory with redundancy | Paul D. Franzon | 2014-08-12 |
| 8793525 | Low-power source-synchronous signaling | Jared L. Zerbe | 2014-07-29 |
| 8769234 | Memory modules and devices supporting configurable data widths | Richard E. Perego, Donald C. Stark, Ely Tsern, Craig E. Hampel | 2014-07-01 |
| 8760944 | Memory component that samples command/address signals in response to both edges of a clock signal | Ely Tsern, Richard E. Perego, Craig E. Hampel | 2014-06-24 |
| 8749042 | Process for making a semiconductor system | Ely Tsern, Ian Shaeffer | 2014-06-10 |
| 8745315 | Memory Systems and methods supporting volatile and wear-leveled nonvolatile physical memory | Ely Tsern | 2014-06-03 |
| 8743636 | Memory module having a write-timing calibration mode | — | 2014-06-03 |
| 8737162 | Clock-forwarding low-power signaling system | Robert E. Palmer, John W. Poulton | 2014-05-27 |
| 8717837 | Memory module | Ely Tsern, Richard E. Perego, Craig E. Hampel | 2014-05-06 |
| 8693556 | Communication channel calibration for drift conditions | Richard E. Perego, Craig E. Hampel | 2014-04-08 |
| 8683149 | Reconfigurable memory controller | John Eric Linstadt, Venu M. Kuchibhotla | 2014-03-25 |
| 8667347 | Active calibration for high-speed memory devices | Jared L. Zerbe, Brian S. Leibowitz | 2014-03-04 |
| 8656254 | Unidirectional error code transfer for both read and write data transmitted via bidirectional data link | Yuanlong Wang | 2014-02-18 |
| 8649460 | Techniques for multi-wire encoding with an embedded clock | Jade M. Kizer | 2014-02-11 |
| 8649475 | Partial-rate transfer mode for fixed-clock-rate interface | Robert E. Palmer, John W. Poulton | 2014-02-11 |
| 8644419 | Periodic calibration for communication channels by drift tracking | Craig E. Hampel, Richard E. Perego | 2014-02-04 |
| 8625371 | Memory component with terminated and unterminated signaling inputs | Ely Tsern, Richard E. Perego, Craig E. Hampel | 2014-01-07 |
| 8621159 | Shared access memory scheme | John Eric Linstadt, Venu M. Kuchibhotla | 2013-12-31 |
| 8605397 | Configurable, power supply voltage referenced single-ended signaling with ESD protection | John W. Poulton, Carl W. Werner | 2013-12-10 |
| 8595459 | Micro-threaded memory | Craig E. Hampel, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai | 2013-11-26 |