Issued Patents All Time
Showing 226–250 of 310 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7051130 | Integrated circuit device that stores a value representative of a drive strength setting | Mark A. Horowitz, Richard M. Barth, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-05-23 |
| 7047375 | Memory system and method for two step memory write operations | Paul G. Davis, Frederick A. Ware | 2006-05-16 |
| 7046056 | System with dual rail regulated locked loop | Jade M. Kizer, Benedict Lau | 2006-05-16 |
| 7039782 | Memory system with channel multiplexing of multiple memory devices | Billy Wayne Garrett, Jr., Frederick A. Ware, Richard M. Barth, Donald C. Stark, Abhijit M. Abhyankar +4 more | 2006-05-02 |
| 7032058 | Apparatus and method for topography dependent signaling | Mark A. Horowitz, Richard M. Barth, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-04-18 |
| 7032057 | Integrated circuit with transmit phase adjustment | Mark A. Horowitz, Richard M. Barth, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-04-18 |
| 7024502 | Apparatus and method for topography dependent signaling | Mark A. Horowitz, Richard M. Barth, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-04-04 |
| 6963956 | Apparatus and method for pipelined memory operations | Richard M. Barth, Ely Tsern, Mark A. Horowitz, Donald C. Stark, Frederick A. Ware +1 more | 2005-11-08 |
| 6960948 | System with phase jumping locked loop circuit | Jade M. Kizer, Benedict Lau, Roxanne Vu | 2005-11-01 |
| 6961831 | Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules | Frederick A. Ware, Richard E. Perego, Ely Tsern | 2005-11-01 |
| 6952123 | System with dual rail regulated locked loop | Jade M. Kizer, Benedict Lau | 2005-10-04 |
| 6934201 | Asynchronous, high-bandwidth memory component using calibrated timing elements | Frederick A. Ware, Ely Tsern, Donald C. Stark | 2005-08-23 |
| 6931467 | Memory integrated circuit device which samples data upon detection of a strobe signal | Richard M. Barth, Frederick A. Ware, John B. Dillon, Donald C. Stark, Matthew Murdy Griffin | 2005-08-16 |
| 6920540 | Timing calibration apparatus and method for a memory device signaling system | Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern, Fredrick A. Ware | 2005-07-19 |
| 6912620 | Memory device which receives write masking information | Frederick A. Ware, Donald C. Stark, Matthew Murdy Griffin | 2005-06-28 |
| 6898085 | Multiple channel modules and bus systems using same | Belgacem Haba, Richard E. Perego, David Nguyen, Billy Wayne Garrett, Jr., Ely Tsern +1 more | 2005-05-24 |
| 6889300 | Memory system and method for two step write operations | Paul G. Davis, Frederick A. Ware | 2005-05-03 |
| 6877054 | Method and apparatus for position dependent data scheduling | — | 2005-04-05 |
| 6868474 | High performance cost optimized memory | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Paul G. Davis, Abhijit M. Abhyankar +2 more | 2005-03-15 |
| 6842864 | Method and apparatus for configuring access times of memory devices | Richard M. Barth, Ely Tsern, Frederick A. Ware, Todd Bystrom, Bradley A. May +1 more | 2005-01-11 |
| 6839266 | Memory module with offset data lines and bit line swizzle configuration | Billy Wayne Garrett, Jr., Frederick A. Ware, Richard M. Barth, Don Stark, Abhijit M. Abhyankar +4 more | 2005-01-04 |
| 6826657 | Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules | Frederick A. Ware, Richard E. Perego, Ely Tsern | 2004-11-30 |
| 6825841 | Granularity memory column access | Richard E. Warmke, Frederick A. Ware | 2004-11-30 |
| 6810449 | Protocol for communication with dynamic memory | Richard M. Barth, Frederick A. Ware, John B. Dillon, Donald C. Stark, Matthew Murdy Griffin | 2004-10-26 |
| 6788594 | Asynchronous, high-bandwidth memory component using calibrated timing elements | Frederick A. Ware, Ely Tsern, Donald C. Stark | 2004-09-07 |