JD

John B. Dillon

RA Rambus: 57 patents #33 of 549Top 7%
Xerox: 2 patents #3,932 of 8,622Top 50%
Overall (All Time): #39,510 of 4,157,543Top 1%
60
Patents All Time

Issued Patents All Time

Showing 25 most recent of 60 patents

Patent #TitleCo-InventorsDate
8458426 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2013-06-04
8096812 Chip socket assembly and chip file assembly for semiconductor chips Donald V. Perino, Wayne S. Richardson 2012-01-17
8086812 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2011-12-27
7353357 Apparatus and method for pipelined memory operations Richard M. Barth, Ely Tsern, Mark A. Horowitz, Donald C. Stark, Craig E. Hampel +1 more 2008-04-01
7352234 Current control technique Michael Ching, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. 2008-04-01
7330951 Apparatus and method for pipelined memory operations Ely Tsern, Mark A. Horowitz, Donald C. Stark, Craig E. Hampel, Frederick A. Ware +1 more 2008-02-12
7287109 Method of controlling a memory device having a memory core Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Matthew Murdy Griffin 2007-10-23
7167039 Memory device having an adjustable voltage swing setting Billy Wayne Garrett, Jr., Michael Ching, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin 2007-01-23
7124270 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2006-10-17
RE39153 Connector with integral transmission line bus James A. Gasbarro, Donald V. Perino 2006-07-04
7065622 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2006-06-20
7010658 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2006-03-07
6975159 Method of operation in a system having a memory device having an adjustable output voltage setting Michael Ching, William F. Stonecynher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. 2005-12-13
6975160 System including an integrated circuit memory device having an adjustable output voltage setting Billy Wayne Garrett, Jr., Michael Ching, William E. Stonecynher, Andy Peng-Pui Chan, Matthew Murdy Griffin 2005-12-13
6963956 Apparatus and method for pipelined memory operations Richard M. Barth, Ely Tsern, Mark A. Horowitz, Donald C. Stark, Craig E. Hampel +1 more 2005-11-08
6931467 Memory integrated circuit device which samples data upon detection of a strobe signal Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Matthew Murdy Griffin 2005-08-16
6870419 Memory system including a memory device having a controlled output driver characteristic Michael Ching, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. 2005-03-22
6810449 Protocol for communication with dynamic memory Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Matthew Murdy Griffin 2004-10-26
6718431 Apparatus and method for pipelined memory operations Richard M. Barth, Ely Tsern, Mark A. Horowitz, Donald C. Stark, Craig E. Hampel +1 more 2004-04-06
6643752 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, Chanh Tran 2003-11-04
6619973 Chip socket assembly and chip file assembly for semiconductor chips Donald V. Perino, Wayne S. Richardson 2003-09-16
6608507 Memory system including a memory device having a controlled output driver characteristic Billy Wayne Garrett, Jr., Michael Ching, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin 2003-08-19
6594326 Apparatus and method for synchronizing a control signal Clemenz Portmann 2003-07-15
6591353 Protocol for communication with dynamic memory Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Matthew Murdy Griffin 2003-07-08
6589059 Chip socket assembly and chip file assembly for semiconductor chips Donald V. Perino, Wayne S. Richardson 2003-07-08