VS

Vaishnav Srinivas

QU Qualcomm: 34 patents #683 of 12,104Top 6%
HP HP: 2 patents #5,870 of 16,619Top 40%
Overall (All Time): #93,521 of 4,157,543Top 3%
36
Patents All Time

Issued Patents All Time

Showing 25 most recent of 36 patents

Patent #TitleCo-InventorsDate
11662765 System for providing a low latency and fast switched cascaded dual phased lock loop (PLL) architecture for die-to-die / system-on-chip (SoC) interfaces Mahalingam Nagarajan, Christophe Avoinne, Xavier Leloup, Michael Jäger 2023-05-30
11493949 Clocking scheme to receive data Farrukh Aquil, Mahalingam Nagarajan, Yong Xu 2022-11-08
11120863 System and method for compensating for SDRAM signal timing drift through periodic write training Farrukh Aquil, Mahalingam Nagarajan, Yong Xu 2021-09-14
10613613 Memory interface with adjustable voltage and termination and methods of use Michael Brunolli, Stephen Thilenius, Patrick Isakanian 2020-04-07
10224081 Dynamic random access memory (DRAM) backchannel communication systems and methods David Ian West, Michael Brunolli, Dexter Tamio Chun 2019-03-05
10169262 Low-power clocking for a high-speed memory interface David Ian West, Michael Brunolli, Jungwon Suh 2019-01-01
9947377 Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses Michael Brunolli, Dexter Tamio Chun, David Ian West 2018-04-17
9910482 Memory interface with adjustable voltage and termination and methods of use Michael Brunolli, Stephen Thilenius, Patrick Isakanian 2018-03-06
9881656 Dynamic random access memory (DRAM) backchannel communication systems and methods David Ian West, Michael Brunolli, Dexter Tamio Chun 2018-01-30
9871012 Method and apparatus for routing die signals using external interconnects Bernie Jord Yang, Michael Brunolli, David Ian West, Charles David Paynter 2018-01-16
9767868 Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses Michael Brunolli, Dexter Tamio Chun, David Ian West 2017-09-19
9734890 Systems and methods for individually configuring dynamic random access memories sharing a common command access bus Farrukh Aquil, Michael Drop, Philip Michael Clovis 2017-08-15
9734878 Systems and methods for individually configuring dynamic random access memories sharing a common command access bus Farrukh Aquil, Michael Drop, Philip Michael Clovis 2017-08-15
9633698 Dynamic control of signaling power based on an error rate Dexter Tamio Chun, David Ian West, Deepti Vijayalakshmi Sriramagiri, Jungwon Suh, Jason Thurston 2017-04-25
9438208 Wide-band duty cycle correction circuit Shraddha Sridhar 2016-09-06
9397646 Delay circuit Guneet Singh, Yuehchun Claire Cheng, Jan Christian Diffenderfer, Robert W. Kim 2016-07-19
9312326 Metal-insulator-metal capacitor structures Renatas Jakushokas, Robert W. Kim 2016-04-12
9246716 Method and apparatus for selectively terminating signals on a bidirectional bus based on bus speed Dexter Tamio Chun, Sumeet Singh Sethi, John Eaton, Vinodh R. Cuppu, Vikram Arora +2 more 2016-01-26
9088445 Method and apparatus for selectively terminating signals on a bidirectional bus based on bus speed Dexter Tamio Chun, Sumeet Singh Sethi, John Eaton, Vinodh R. Cuppu, Vikram Arora +2 more 2015-07-21
9041148 Metal-insulator-metal capacitor structures Renatas Jakushokas, Robert W. Kim 2015-05-26
9032358 Integrated circuit floorplan for compact clock distribution Robert W. Kim, Philip Michael Clovis, David Ian West 2015-05-12
8957714 Measure-based delay circuit Jan Christian Diffenderfer, Philip Michael Clovis, David Ian West 2015-02-17
8593203 High signal level compliant input/output circuits Vijay Shankar, Abheek Gupta, Vivek Mohan 2013-11-26
8363538 Orthogonal data link, and associated methods Karl J. Bois, Derek L. Knee 2013-01-29
8138814 High signal level compliant input/output circuits Vijay Shankar, Abheek Gupta, Vivek Mohan 2012-03-20