Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11809906 | Systems and methods to control bandwidth through shared transaction limits | Nachiappan Chidambaram Nachiappan, Matthew R. Johnson | 2023-11-07 |
| 11748284 | Systems and methods for arbitrating traffic in a bus | Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami +1 more | 2023-09-05 |
| 11436049 | Systems and methods to control bandwidth through shared transaction limits | Nachiappan Chidambaram Nachiappan, Matthew R. Johnson | 2022-09-06 |
| 11093425 | Systems and methods for arbitrating traffic in a bus | Nachiappan Chidambaram Nachiappan, Jaideep Dastidar, Yiu Chun Tse, Ripudaman Singh, Shawn Munetoshi Fukami +1 more | 2021-08-17 |
| 10972408 | Configurable packet arbitration with minimum progress guarantees | Nachiappan Chidambaram Nachiappan | 2021-04-06 |
| 10963172 | Systems and methods for providing a back pressure free interconnect | Nachiappan Chidambaram Nachiappan, David L. Trawick, Yiu Chun Tse, Deniz Balkan, Hengsheng Geng +3 more | 2021-03-30 |
| 10423558 | Systems and methods for controlling data on a bus using latency | Shawn Munetoshi Fukami, Yiu Chun Tse, David L. Trawick, Hengsheng Geng, Jaideep Dastidar +1 more | 2019-09-24 |
| 10255218 | Systems and methods for maintaining specific ordering in bus traffic | Yiu Chun Tse, Deniz Balkan, Shawn Munetoshi Fukami, Jaideep Dastidar, Hengsheng Geng | 2019-04-09 |
| 9864647 | System and method for dynamic bandwidth throttling based on danger signals monitored from one more elements utilizing shared resources | Serag Gadelrab, Cristian Duroiu, Vinod Chamarty, Pooja Sinha, John Daniel Chaparro +6 more | 2018-01-09 |
| 9246716 | Method and apparatus for selectively terminating signals on a bidirectional bus based on bus speed | Dexter Tamio Chun, Sumeet Singh Sethi, John Eaton, Vikram Arora, Vaishnav Srinivas +2 more | 2016-01-26 |
| 9088445 | Method and apparatus for selectively terminating signals on a bidirectional bus based on bus speed | Dexter Tamio Chun, Sumeet Singh Sethi, John Eaton, Vikram Arora, Vaishnav Srinivas +2 more | 2015-07-21 |
| 9086877 | System and method of monitoring a central processing unit in real time | Steven S. Thomson, Ali Iranli, Michael Drop, Christopher Kong Yee Chun, Tao Xue +2 more | 2015-07-21 |
| 8352759 | System and method of monitoring a central processing unit in real time | Steven S. Thomson, Ali Iranli, Michael Drop, Christopher Kong Yee Chun, Tao Xue +2 more | 2013-01-08 |
| 6948051 | Method and apparatus for reducing logic activity in a microprocessor using reduced bit width slices that are enabled or disabled depending on operation width | Jude A. Rivers, Jaime Moreno | 2005-09-20 |