| 11527282 |
SRAM with burst mode operation |
Changho Jung, Keejong Kim, Chulmin Jung |
2022-12-13 |
$27,878,000 |
| 10923185 |
SRAM with burst mode operation |
Changho Jung, Keejong Kim, Chulmin Jung |
2021-02-16 |
$43,472,000 |
| 10622044 |
Memory hold margin characterization and correction circuit |
Bipin Duggal, Naishad Narendra Parikh |
2020-04-14 |
$17,407,000 |
| 10290345 |
Intelligent bit line precharge for improved dynamic power |
Arun Babu Pallerla |
2019-05-14 |
$19,257,000 |
| 10242720 |
Dual sensing current latched sense amplifier |
Nan Chen |
2019-03-26 |
$7,875,000 |
| 10141317 |
Metal layers for a three-port bit cell |
Niladri Narayan Mojumder, Ping-Lin Liu, Stanley Seungchul Song, Zhongze Wang, Choh Fei Yeap |
2018-11-27 |
$6,998,000 |
| 9916904 |
Reducing leakage current in a memory device |
Nan Chen, Mehdi Hamidi Sani |
2018-03-13 |
$18,649,000 |
| 9524972 |
Metal layers for a three-port bit cell |
Niladri Narayan Mojumder, Ping-Lin Liu, Stanley Seungchul Song, Zhongze Wang, Choh Fei Yeap |
2016-12-20 |
$14,830,000 |
| 9514805 |
Intelligent bit line precharge for improved dynamic power |
Arun Babu Pallerla |
2016-12-06 |
$11,421,000 |
| 9418716 |
Word line and bit line tracking across diverse power domains |
Arun Babu Pallerla |
2016-08-16 |
$12,572,000 |
| 9188642 |
Reconfigurable memory interface circuit to support a built-in memory scan chain |
Chirag Gulati, Lakshmikantha Holla Vakwadi |
2015-11-17 |
$6,269,000 |
| 9111589 |
Memory timing circuit |
Rakesh Sinha, Chirag Gulati, Sei Seung Yoon |
2015-08-18 |
$6,950,000 |
| 9082465 |
Weak keeper circuit for memory device |
Balachander Ganesan, Sei Seung Yoon |
2015-07-14 |
$5,057,000 |
| 9030863 |
Read/write assist for memories |
Chirag Gulati, Rakesh Sinha, Sei Seung Yoon |
2015-05-12 |
$12,123,000 |
| 8929153 |
Memory with multiple word line design |
Chirag Gulati, Rakesh Sinha, Sei Seung Yoon |
2015-01-06 |
$8,379,000 |
| 8760953 |
Sense amplifier with selectively powered inverter |
Nan Chen, Zhiqin Chen |
2014-06-24 |
$8,441,000 |
| 8223567 |
Memory read stability using selective precharge |
Mohamed H. Abu Rahma, Nan Chen, Sei Seung Yoon |
2012-07-17 |
$20,415,000 |
| 8183713 |
System and method of providing power using switching circuits |
Hari M. Rao, Nan Chen |
2012-05-22 |
$14,225,000 |
| 7884645 |
Voltage level shifting circuit and method |
Nan Chen |
2011-02-08 |
$66,784,000 |
| 7881137 |
Read assist for memory circuits with different precharge voltage levels for bit line pair |
Nan Chen |
2011-02-01 |
$15,188,000 |
| 7710183 |
CMOS level shifter circuit design |
Dongkyu Park, Changho Jung, Sei Seung Yoon |
2010-05-04 |
$23,132,000 |
