Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11527282 | SRAM with burst mode operation | Changho Jung, Keejong Kim, Chulmin Jung | 2022-12-13 |
| 10923185 | SRAM with burst mode operation | Changho Jung, Keejong Kim, Chulmin Jung | 2021-02-16 |
| 10622044 | Memory hold margin characterization and correction circuit | Bipin Duggal, Naishad Narendra Parikh | 2020-04-14 |
| 10290345 | Intelligent bit line precharge for improved dynamic power | Arun Babu Pallerla | 2019-05-14 |
| 10242720 | Dual sensing current latched sense amplifier | Nan Chen | 2019-03-26 |
| 10141317 | Metal layers for a three-port bit cell | Niladri Narayan Mojumder, Ping-Lin Liu, Stanley Seungchul Song, Zhongze Wang, Choh Fei Yeap | 2018-11-27 |
| 9916904 | Reducing leakage current in a memory device | Nan Chen, Mehdi Hamidi Sani | 2018-03-13 |
| 9524972 | Metal layers for a three-port bit cell | Niladri Narayan Mojumder, Ping-Lin Liu, Stanley Seungchul Song, Zhongze Wang, Choh Fei Yeap | 2016-12-20 |
| 9514805 | Intelligent bit line precharge for improved dynamic power | Arun Babu Pallerla | 2016-12-06 |
| 9418716 | Word line and bit line tracking across diverse power domains | Arun Babu Pallerla | 2016-08-16 |
| 9188642 | Reconfigurable memory interface circuit to support a built-in memory scan chain | Chirag Gulati, Lakshmikantha Holla Vakwadi | 2015-11-17 |
| 9111589 | Memory timing circuit | Rakesh Sinha, Chirag Gulati, Sei Seung Yoon | 2015-08-18 |
| 9082465 | Weak keeper circuit for memory device | Balachander Ganesan, Sei Seung Yoon | 2015-07-14 |
| 9030863 | Read/write assist for memories | Chirag Gulati, Rakesh Sinha, Sei Seung Yoon | 2015-05-12 |
| 8929153 | Memory with multiple word line design | Chirag Gulati, Rakesh Sinha, Sei Seung Yoon | 2015-01-06 |
| 8760953 | Sense amplifier with selectively powered inverter | Nan Chen, Zhiqin Chen | 2014-06-24 |
| 8223567 | Memory read stability using selective precharge | Mohamed H. Abu Rahma, Nan Chen, Sei Seung Yoon | 2012-07-17 |
| 8183713 | System and method of providing power using switching circuits | Hari M. Rao, Nan Chen | 2012-05-22 |
| 7884645 | Voltage level shifting circuit and method | Nan Chen | 2011-02-08 |
| 7881137 | Read assist for memory circuits with different precharge voltage levels for bit line pair | Nan Chen | 2011-02-01 |
| 7710183 | CMOS level shifter circuit design | Dongkyu Park, Changho Jung, Sei Seung Yoon | 2010-05-04 |