Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and system for wafer level singulation

Method and system for wafer level singulation

US Patent 8580615 · Granted Nov 12, 2013

Estimated economic value: $7,355,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Atomic layer deposition coating system for inner walls of gas lines2025
Methods of operating a spatial deposition tool2025
Atomic layer deposition coatings for high temperature ceramic components2025
Mainframe of dual-robot substrate processing system2025
Plasma chamber with multiphase rotating independent gas cross-flow with reduced 2025
Parallel atomic layer deposition of target element interiors2025
Substrate support gap pumping to prevent glow discharge and light-up2025
Mainframe with integrated lid2025
Dithering or dynamic offsets for improved uniformity2025
Electronic device manufacturing system2025
Monolithic complementary field-effect transistors having carbon-doped release la2025
Zone-controlled rare-earth oxide ALD and CVD coatings2025