Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System for monitoring and controlling an integrated circuit testing machine

System for monitoring and controlling an integrated circuit testing machine

US Patent 11428735 · Granted Aug 30, 2022

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Wafer-level chip-scale package device having bump assemblies configured to maint2020
Wafer level package device formed using a wafer level lead frame on a carrier wa2019
Three-dimensional chip-to-wafer integration2018
Wafer-level chip-scale package device having bump assemblies configured to furni2017
Solder fatigue arrest for wafer level package2017
Technique for wafer-level processing of QFN packages2016
Low-cost low-profile solder bump process for enabling ultra-thin wafer-level pac2016
Wafer-level passive device integration2016
Multi-die, high current wafer level package2016
Wafer-level package device having high-standoff peripheral solder bumps2015
Three-dimensional chip-to-wafer integration2015
Integrated circuit device having extended under ball metallization2015