Issued Patents All Time
Showing 26–50 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8892622 | Pipelined divide circuit for small operand sizes | Christopher H. Olson | 2014-11-18 |
| 8832464 | Processor and method for implementing instruction support for hash algorithms | Christopher H. Olson, Robert T. Golla | 2014-09-09 |
| 8671129 | System and method of bypassing unrounded results in a multiply-add pipeline unit | Christopher H. Olson | 2014-03-11 |
| 8534079 | Freezer with liquid cryogen refrigerant and method | — | 2013-09-17 |
| 8458444 | Apparatus and method for handling dependency conditions between floating-point instructions | Yuan C. Chou, Jared C. Smolens | 2013-06-04 |
| 8452831 | Apparatus and method for implementing hardware support for denormalized operands for floating-point divide operations | Christopher H. Olson | 2013-05-28 |
| 8438208 | Processor and method for implementing instruction support for multiplication of large operands | Christopher H. Olson, Robert T. Golla, Paul J. Jordan | 2013-05-07 |
| 8430895 | Floating gastrointestinal anchor | Eran Hirszowicz | 2013-04-30 |
| 8430894 | Floating gastrointestinal anchor | Eran Hirszowicz | 2013-04-30 |
| 8429636 | Handling dependency conditions between machine instructions | Yuan C. Chou, Jared C. Smolens | 2013-04-23 |
| 8403952 | Floating gastrointestinal anchor | Eran Hirszowicz | 2013-03-26 |
| 8335912 | Logical map table for detecting dependency conditions between instructions having varying width operand values | Robert T. Golla, Jama I. Barreh, Howard Levy | 2012-12-18 |
| 8239440 | Processor which implements fused and unfused multiply-add instructions in a pipelined manner | Christopher H. Olson | 2012-08-07 |
| 8195919 | Handling multi-cycle integer operations for a multi-threaded processor | Christopher H. Olson, Robert T. Golla, Manish K. Shah | 2012-06-05 |
| 7941642 | Method for selecting between divide instructions associated with respective threads in a multi-threaded processor | Robert T. Golla, Christopher H. Olson | 2011-05-10 |
| 7798339 | Rail and slider system | Gregory A. Wirtel | 2010-09-21 |
| 7774393 | Apparatus and method for integer to floating-point format conversion | Sadar Ahmed | 2010-08-10 |
| 7591385 | System for holding implements | — | 2009-09-22 |
| 7539720 | Low latency integer divider and integration with floating point divider and method | Christopher H. Olson, Paul J. Jagodik | 2009-05-26 |
| 7523330 | Thread-based clock enabling in a multi-threaded processor | Robert T. Golla, Christopher H. Olson | 2009-04-21 |
| 7478225 | Apparatus and method to support pipelining of differing-latency instructions in a multithreaded processor | Christopher H. Olson, Robert T. Golla | 2009-01-13 |
| 7437538 | Apparatus and method for reducing execution latency of floating point operations having special case operands | Christopher H. Olson | 2008-10-14 |
| 7433912 | Multiplier structure supporting different precision multiplication operations | Paul J. Jagodik, Christopher H. Olson | 2008-10-07 |
| 7373489 | Apparatus and method for floating-point exception prediction and recovery | Paul J. Jordan, Rabin Sugumar | 2008-05-13 |
| 7216216 | Register window management using first pipeline to change current window and second pipeline to read operand from old window and write operand to new window | Christopher H. Olson, Robert T. Golla | 2007-05-08 |