Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6956910 | Fast transmitter based on table lookup | Jin Lu | 2005-10-18 |
| 6925643 | Method and apparatus for thread-based memory access in a multithreaded processor | Erdem Hokenek, C. John Glossner | 2005-08-02 |
| 6912623 | Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy | Erdem Hokenek, C. John Glossner, Arthur Joseph Hoane, Shenghong Wang | 2005-06-28 |
| 6904511 | Method and apparatus for register file port reduction in a multithreaded processor | Erdem Hokenek, C. John Glossner | 2005-06-07 |
| 6842848 | Method and apparatus for token triggered multithreading | Erdem Hokenek, C. John Glossner | 2005-01-11 |
| 6704855 | Method and apparatus for reducing encoding needs and ports to shared resources in a processor | Erik R. Altman, Jaime Moreno | 2004-03-09 |
| 6665790 | Vector register file with arbitrary vector addressing | Clair John Glossner, III, Erdem Hokenek, David Meltzer | 2003-12-16 |
| 6578094 | Method for preventing buffer overflow attacks | — | 2003-06-10 |
| 6269039 | System and method for refreshing memory devices | Clair John Glossner, III, Erdem Hokenek, David Meltzer | 2001-07-31 |
| 6032244 | Multiple issue static speculative instruction scheduling with path tag and precise interrupt handling | — | 2000-02-29 |
| 5860138 | Processor with compiler-allocated, variable length intermediate storage | David R. Engebretsen, Steven Lee Gregor, John C. Willis | 1999-01-12 |
| 5758051 | Method and apparatus for reordering memory operations in a processor | Jaime Moreno | 1998-05-26 |