| 8959315 |
Multithreaded processor with multiple concurrent pipelines per thread |
Mayan Moudgill, Michael Schulte, C. John Glossner |
2015-02-17 |
| 8918627 |
Multithreaded processor with multiple concurrent pipelines per thread |
Mayan Moudgill, Michael Schulte, C. John Glossner |
2014-12-23 |
| 8892849 |
Multithreaded processor with multiple concurrent pipelines per thread |
Mayan Moudgill, Michael Schulte, C. John Glossner |
2014-11-18 |
| 8762688 |
Multithreaded processor with multiple concurrent pipelines per thread |
Mayan Moudgill, Michael Schulte, C. John Glossner |
2014-06-24 |
| 8074051 |
Multithreaded processor with multiple concurrent pipelines per thread |
Mayan Moudgill, Michael Schulte, C. John Glossner |
2011-12-06 |
| 7797363 |
Processor having parallel vector multiply and reduce operations with sequential semantics |
Michael Schulte, Mayan Moudgill, C. John Glossner |
2010-09-14 |
| 7475222 |
Multi-threaded processor having compound instruction and operation formats |
C. John Glossner, Mayan Moudgill, Michael Schulte |
2009-01-06 |
| 7467288 |
Vector register file with arbitrary vector addressing |
Clair John Glossner, III, David Meltzer, Mayan Moudgill |
2008-12-16 |
| 7428567 |
Arithmetic unit for addition or subtraction with preliminary saturation detection |
Michael Schulte, Pablo Balzola, C. John Glossner |
2008-09-23 |
| 7356673 |
System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form |
Erik R. Altman, Clair John Glossner, III, David Meltzer, Mayan Moudgill |
2008-04-08 |
| 7308559 |
Digital signal processor with cascaded SIMD organization |
Clair John Glossner, III, David Meltzer, Mayan Moudgill |
2007-12-11 |
| 7209529 |
Doppler compensated receiver |
Daniel Iancu, John Glossner, Mayan Moudgill, Vladimir Kotlyar |
2007-04-24 |
| 7055102 |
Turbo decoder using parallel processing |
Jin Lu, Joon-Hwa Chun, Mayan Moudgill |
2006-05-30 |
| 6990509 |
Ultra low power adder with sum synchronization |
Eko Lisuwandi, David Meltzer, Mayan Moudgill, Victor Zyuban |
2006-01-24 |
| 6990557 |
Method and apparatus for multithreaded cache with cache eviction based on thread identifier |
C. John Glossner, Arthur Joseph Hoane, Mayan Moudgill, Shenghong Wang |
2006-01-24 |
| 6971103 |
Inter-thread communications using shared interrupt register |
Mayan Moudgill, Sean M. Dorward |
2005-11-29 |
| 6968445 |
Multithreaded processor with efficient processing for convergence device applications |
Mayan Moudgill, C. John Glossner |
2005-11-22 |
| 6925643 |
Method and apparatus for thread-based memory access in a multithreaded processor |
Mayan Moudgill, C. John Glossner |
2005-08-02 |
| 6912623 |
Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy |
C. John Glossner, Arthur Joseph Hoane, Mayan Moudgill, Shenghong Wang |
2005-06-28 |
| 6904511 |
Method and apparatus for register file port reduction in a multithreaded processor |
Mayan Moudgill, C. John Glossner |
2005-06-07 |
| 6842848 |
Method and apparatus for token triggered multithreading |
Mayan Moudgill, C. John Glossner |
2005-01-11 |
| 6665790 |
Vector register file with arbitrary vector addressing |
Clair John Glossner, III, David Meltzer, Mayan Moudgill |
2003-12-16 |
| 6269039 |
System and method for refreshing memory devices |
Clair John Glossner, III, David Meltzer, Mayan Moudgill |
2001-07-31 |
| 5841999 |
Information handling system having a register remap structure using a content addressable table |
Hung Q. Le |
1998-11-24 |
| 4926369 |
Leading 0/1 anticipator (LZA) |
Robert K. Montoye |
1990-05-15 |
