| 7467288 |
Vector register file with arbitrary vector addressing |
Erdem Hokenek, David Meltzer, Mayan Moudgill |
2008-12-16 |
| 7356673 |
System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form |
Erik R. Altman, Erdem Hokenek, David Meltzer, Mayan Moudgill |
2008-04-08 |
| 7308559 |
Digital signal processor with cascaded SIMD organization |
Erdem Hokenek, David Meltzer, Mayan Moudgill |
2007-12-11 |
| 6665790 |
Vector register file with arbitrary vector addressing |
Erdem Hokenek, David Meltzer, Mayan Moudgill |
2003-12-16 |
| 6269039 |
System and method for refreshing memory devices |
Erdem Hokenek, David Meltzer, Mayan Moudgill |
2001-07-31 |
| 6128720 |
Distributed processing array with component processors performing customized interpretation of instructions |
Gerald George Pechanek, Larry D. Larsen, Stamatis Vassiliaadis |
2000-10-03 |
| 5682491 |
Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier |
Gerald George Pechanek, Larry D. Larsen, Stamatis Vassiliaadis, Daniel H. McCabe |
1997-10-28 |
| 5659785 |
Array processor communication architecture with broadcast processor instructions |
Gerald George Pechanek, Larry D. Larsen, Stamatis Vassiliaadis |
1997-08-19 |
| 5649135 |
Parallel processing system and method using surrogate instructions |
Gerald George Pechanek, Larry D. Larsen, Stamatis Vassiliadis |
1997-07-15 |
