Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11589639 | Light symbol projection device | — | 2023-02-28 |
| 8621410 | Multiprocessor computer system and method having at least one processor with a dynamically reconfigurable instruction set | — | 2013-12-31 |
| 8571421 | Highly tunable, low jitter optical clock generation | Ruth A. Betcher | 2013-10-29 |
| 7805690 | Method for generating compiler, simulation, synthesis and test suite from a common processor specification | — | 2010-09-28 |
| 7539602 | Accelerating simulation of differential equation systems having continuous behavior | — | 2009-05-26 |
| 7328195 | Semi-automatic generation of behavior models continuous value using iterative probing of a device or existing component model | — | 2008-02-05 |
| 7278122 | Hardware/software design tool and language specification mechanism enabling efficient technology retargeting and optimization | — | 2007-10-02 |
| 6321376 | Apparatus and method for semi-automated generation and application of language conformity tests | Robert Neill Newshutz, Philip Wilsey | 2001-11-20 |
| 6233599 | Apparatus and method for retrofitting multi-threaded operations on a computer by partitioning and overlapping registers | George Wayne Nation, Robert Neill Newshutz | 2001-05-15 |
| 6223208 | Moving data in and out of processor units using idle register/storage functional units | Kenneth J. Kiefer, David Arnold Luick | 2001-04-24 |
| 6088768 | Method and system for maintaining cache coherence in a multiprocessor-multicache environment having unordered communication | Donald Francis Baldus, Nancy Joan Duffield, Russell D. Hoover, Frederick J. Ziegler | 2000-07-11 |
| 6088769 | Multiprocessor cache coherence directed by combined local and global tables | David Arnold Luick, Philip Braun Winterfield | 2000-07-11 |
| 5999734 | Compiler-oriented apparatus for parallel compilation, simulation and execution of computer programs and hardware models | Robert Neill Newshutz | 1999-12-07 |
| 5872990 | Reordering of memory reference operations and conflict resolution via rollback in a multiprocessing environment | David Arnold Luick, Philip Braun Winterfield | 1999-02-16 |
| 5860138 | Processor with compiler-allocated, variable length intermediate storage | David R. Engebretsen, Steven Lee Gregor, Mayan Moudgill | 1999-01-12 |
| 5761721 | Method and system for cache coherence despite unordered interconnect transport | Donald Francis Baldus, Nancy Joan Duffield, Russell D. Hoover, Frederick J. Ziegler | 1998-06-02 |
| 5604882 | System and method for empty notification from peer cache units to global storage control unit in a multiprocessor data processing system | Russell D. Hoover, Donald Francis Baldus, Frederick J. Ziegler, Lishing Liu | 1997-02-18 |
| 5469446 | Retry filter and circulating echo method and apparatus | Ronald Edward Fuhs, William A. Hammond, George Wayne Nation, Steven Rogers | 1995-11-21 |
| 5442632 | Stale packet removal method and apparatus | Robert Walter Burton, William A. Hammond | 1995-08-15 |