Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8892849 | Multithreaded processor with multiple concurrent pipelines per thread | Erdem Hokenek, Michael Schulte, C. John Glossner | 2014-11-18 |
| 8819099 | Software implementation of matrix inversion in a wireless communication system | Mihai Sima, Daniel Iancu, Hua Ye | 2014-08-26 |
| 8762688 | Multithreaded processor with multiple concurrent pipelines per thread | Erdem Hokenek, Michael Schulte, C. John Glossner | 2014-06-24 |
| 8732382 | Haltable and restartable DMA engine | Shenghong Wang | 2014-05-20 |
| 8539188 | Method for enabling multi-processor synchronization | Vitaly Kalashnikov, Murugappan Senthilvelan, Umesh Srikantiah, Tak-po Li, Pablo Balzola | 2013-09-17 |
| 8471597 | Power saving circuit using a clock buffer and multiple flip-flops | Shenghong Wang, Gary J. Nacer | 2013-06-25 |
| 8407456 | Method and instruction set including register shifts and rotates for data processing | — | 2013-03-26 |
| 8171265 | Accelerating traceback on a signal processor | Sitij Agrawal | 2012-05-01 |
| 8074051 | Multithreaded processor with multiple concurrent pipelines per thread | Erdem Hokenek, Michael Schulte, C. John Glossner | 2011-12-06 |
| 8056064 | Method for recognition of acyclic instruction patterns | Vladimir Kotlyar | 2011-11-08 |
| 7895413 | Microprocessor including register renaming unit for renaming target registers in an instruction with physical registers in a register sub-file | — | 2011-02-22 |
| 7797363 | Processor having parallel vector multiply and reduce operations with sequential semantics | Erdem Hokenek, Michael Schulte, C. John Glossner | 2010-09-14 |
| 7475222 | Multi-threaded processor having compound instruction and operation formats | C. John Glossner, Erdem Hokenek, Michael Schulte | 2009-01-06 |
| 7467288 | Vector register file with arbitrary vector addressing | Clair John Glossner, III, Erdem Hokenek, David Meltzer | 2008-12-16 |
| 7356673 | System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form | Erik R. Altman, Clair John Glossner, III, Erdem Hokenek, David Meltzer | 2008-04-08 |
| 7308559 | Digital signal processor with cascaded SIMD organization | Clair John Glossner, III, Erdem Hokenek, David Meltzer | 2007-12-11 |
| 7209529 | Doppler compensated receiver | Daniel Iancu, John Glossner, Erdem Hokenek, Vladimir Kotlyar | 2007-04-24 |
| 7171438 | Method for recognition of full-word saturating addition and subtraction | Vladimir Kotlyar | 2007-01-30 |
| 7120780 | Method of renaming registers in register file and microprocessor thereof | — | 2006-10-10 |
| 7058117 | Rake receiver with multi-path interference accommodation | Daniel Iancu, John Glossner | 2006-06-06 |
| 7055102 | Turbo decoder using parallel processing | Jin Lu, Joon-Hwa Chun, Erdem Hokenek | 2006-05-30 |
| 6990557 | Method and apparatus for multithreaded cache with cache eviction based on thread identifier | Erdem Hokenek, C. John Glossner, Arthur Joseph Hoane, Shenghong Wang | 2006-01-24 |
| 6990509 | Ultra low power adder with sum synchronization | Erdem Hokenek, Eko Lisuwandi, David Meltzer, Victor Zyuban | 2006-01-24 |
| 6971103 | Inter-thread communications using shared interrupt register | Erdem Hokenek, Sean M. Dorward | 2005-11-29 |
| 6968445 | Multithreaded processor with efficient processing for convergence device applications | Erdem Hokenek, C. John Glossner | 2005-11-22 |