Issued Patents All Time
Showing 76–100 of 129 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8225074 | Methods and systems for managing computations on a hybrid computing platform including a parallel accelerator | Anand Raghunathan, Narayanan Sundaram | 2012-07-17 |
| 7921206 | Visibility and control of wireless sensor networks | Kiran Nagaraja, Vijay Raghunathan, Florin Sultan, Nupur Kothari | 2011-04-05 |
| 7818643 | Method for blocking unknown values in output response of scan test patterns for testing circuits | Seongmoon Wang | 2010-10-19 |
| 7784046 | Automatically boosting the software content of system LSI designs | Marcello Lajolo, Kanishka Lahiri, Abhishek MITRA | 2010-08-24 |
| 7653670 | Storage-efficient and collision-free hash-based packet processing architecture and method | Jahangir Hasan, Srihari Cadambi | 2010-01-26 |
| 7610527 | Test output compaction with improved blocking of unknown values | Seongmoon Wang, Kedarnath Balakrishnan | 2009-10-27 |
| 7610540 | Method for generating, from a test cube set, a generator configured to generate a test pattern | Kedarnath Balakrishnan, Seongmoon Wang, Wenlong Wei | 2009-10-27 |
| 7610539 | Method and apparatus for testing logic circuit designs | Kedarnath Balakrishnan, Seongmoon Wang, Wenlong Wei | 2009-10-27 |
| 7592935 | Information retrieval architecture for packet classification | Srihari Cadambi | 2009-09-22 |
| 7581142 | Method and system usable in sensor networks for handling memory faults | Florin Sultan, Kiran Nagaraja, Ram Kumar RENGASWAMY | 2009-08-25 |
| 7577540 | Re-configurable embedded core test protocol for system-on-chips (SOC) and circuit boards | Seongmoon Wang, Kedarnath Balakrishnan | 2009-08-18 |
| 7562321 | Method and apparatus for structured ASIC test point insertion | Seongmoon Wang | 2009-07-14 |
| 7529669 | Voice-based multimodal speaker authentication using adaptive training and applications thereof | Srivaths Ravi, Anand Raghunathan, Karthik Nandakumar | 2009-05-05 |
| 7484151 | Method and apparatus for testing logic circuit designs | Kedarnath Balakrishnan, Seongmoon Wang, Wenlong Wei | 2009-01-27 |
| 7474750 | Dynamic content-aware memory compression and encryption architecture | Haris Lekatsas, Joerg Henkel, Venkata Jakkula | 2009-01-06 |
| 7398278 | Prefix processing technique for faster IP routing | Srihari Cadambi, Hirohiko Shibata | 2008-07-08 |
| 7313746 | Test output compaction for responses with unknown values | Chia-Tso Chao, Seongmoon Wang | 2007-12-25 |
| 7313743 | Hybrid scan-based delay testing technique for compact and high fault coverage test set | Seongmoon Wang, Xiao Liu | 2007-12-25 |
| 7302626 | Test pattern compression with pattern-independent design-independent seed compression | Kedarnath Balakrishnan, Seongmoon Wang | 2007-11-27 |
| 7302543 | Compressed memory architecture for embedded systems | Haris Lekatsas, Joerg Henkel, Venkata Jakkula | 2007-11-27 |
| 7284176 | Externally-loaded weighted random test pattern compression | Seongmoon Wang | 2007-10-16 |
| 7278123 | System-level test architecture for delivery of compressed tests | Srivaths Ravi, Anand Raghunathan, Loganathan Lingappan, Niraj K. Jha | 2007-10-02 |
| 7222277 | Test output compaction using response shaper | Seongmoon Wang, Chia-Tso Chao | 2007-05-22 |
| 7203935 | Hardware/software platform for rapid prototyping of code compression technologies | Jörg Henkel, Venkata Jakkula, Haris Lekatsas, Murugan Sankaradass | 2007-04-10 |
| 7188323 | Restricted scan reordering technique to enhance delay fault coverage | Seongmoon Wang, Wei Li | 2007-03-06 |