Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6024888 | Vapor selective etching method and apparatus | Mitsusuke Kyogoku | 2000-02-15 |
| 6022772 | Stacked capacitor having a corrugated electrode | Ichiroh Honma | 2000-02-08 |
| 5989969 | Method of producing silicon layer having surface controlled to be uneven | Ichiro Honma | 1999-11-23 |
| 5972750 | Nonvolatile semiconductor memory device and manufacturing method of the same | Hiroki Shirai, Taishi Kubota, Ichiro Honma, Haruhiko Ono, Takeshi Okazawa | 1999-10-26 |
| 5973355 | Nonvolatile semiconductor memory device and manufacturing method of the same | Hiroki Shirai, Taishi Kubota, Ichiro Honma, Haruhiko Ono, Takeshi Okazawa | 1999-10-26 |
| 5959326 | Capacitor incorporated in semiconductor device having a lower electrode composed of multi-layers or of graded impurity concentration | Fumiki Aiso, Toshiyuki Hirota, Masanobu Zenke, Shuji Fujiwara | 1999-09-28 |
| 5910019 | Method of producing silicon layer having surface controlled to be uneven or even | Ichiro Honma | 1999-06-08 |
| 5863602 | Method for capturing gaseous impurities and semiconductor device manufacturing apparatus | Toshiyuki Hirota, Takashi Ogawa | 1999-01-26 |
| 5837594 | Method of manufacturing a semiconductor device wherein one of capacitor electrodes comprises a conductor pole and a tray-shaped conductor layer | Ichiroh Honma | 1998-11-17 |
| 5835337 | Stacked capacitor having a corrugated electrode | Ichiroh Honma | 1998-11-10 |
| 5753949 | Semiconductor device wherein one of capacitor electrodes comprises a conductor pole and conductor layer | Ichiroh Honma | 1998-05-19 |
| 5723379 | Method for fabricating polycrystalline silicon having micro roughness on the surface | Toru Tatsumi | 1998-03-03 |
| 5691249 | Method for fabricating polycrystalline silicon having micro roughness on the surface | Toru Tatsumi | 1997-11-25 |
| 5661052 | Method of fabricating semiconductor device having low-resistance gate electrode and diffusion layers | Ken Inoue, Makoto Sekine, Ichirou Honma | 1997-08-26 |
| 5658417 | HF vapor selective etching method and apparatus | Mitsusuke Kyogoku | 1997-08-19 |
| 5623243 | Semiconductor device having polycrystalline silicon layer with uneven surface defined by hemispherical or mushroom like shape silicon grain | Toru Tatsumi | 1997-04-22 |
| 5397748 | Method of producing semiconductor device with insulating film having at least silicon nitride film | Sadayuki Ohnishi | 1995-03-14 |
| 5372962 | Method of making a semiconductor integrated circuit device having a capacitor with a porous surface of an electrode | Toshiyuki Hirota, Ichirou Honma, Masanobu Zenke | 1994-12-13 |
| 5366917 | Method for fabricating polycrystalline silicon having micro roughness on the surface | Toru Tatsumi | 1994-11-22 |
| 5366920 | Method for fabricating a thin film capacitor | Shintaro Yamamichi, Toshiki Hashimoto, Toshiyuki Sakuma | 1994-11-22 |