Issued Patents All Time
Showing 1–25 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7554837 | Magnetic memory device | Shuichi Ueno, Haruo Furuta | 2009-06-30 |
| 7403415 | Magnetic memory device | Shuichi Ueno, Haruo Furuta | 2008-07-22 |
| 7180773 | Magnetic memory device | Shuichi Ueno, Haruo Furuta | 2007-02-20 |
| 6815295 | Method of manufacturing field effect transistors | Shuichi Ueno, Shigenobu Maeda, Shigeto Maegawa | 2004-11-09 |
| 6777758 | Semiconductor device | Tomohiro Yamashita, Katsuyuki Horita | 2004-08-17 |
| 6770522 | Semiconductor device and manufacturing method thereof | Shuichi Ueno, Haruo Furuta | 2004-08-03 |
| 6734486 | Recessed plug semiconductor device and manufacturing method thereof | — | 2004-05-11 |
| 6670277 | Method of manufacturing semiconductor device | Hirokazu Sayama | 2003-12-30 |
| 6577021 | Static-type semiconductor memory device | Chikayoshi Morishima, Takashi Kuroi | 2003-06-10 |
| 6492690 | Semiconductor device having control electrodes with different impurity concentrations | Shuichi Ueno, Shigenobu Maeda, Shigeto Maegawa | 2002-12-10 |
| 6461920 | Semiconductor device and method of manufacturing the same | Masayoshi Shirahata | 2002-10-08 |
| 6399985 | Semiconductor device | Katsuyuki Horita, Takashi Kuroi | 2002-06-04 |
| 6388295 | Semiconductor device and method of manufacturing the same | Tomohiro Yamashita, Atsushi Hachisuka, Shinya Soeda | 2002-05-14 |
| 6333535 | Semiconductor device | — | 2001-12-25 |
| 6300656 | Nonvolatile semiconductor memory device having a drain region of different impurity density and conductivity types | Shuichi Ueno, Shigeru Kusunoki | 2001-10-09 |
| 6163046 | Semiconductor device and method of fabricating semiconductor device | Masayoshi Shirahata | 2000-12-19 |
| 6162669 | Method of manufacturing a semiconductor device having an LDD structure with a recess in the source/drain region formed during removal of a damaged layer | Katsuyuki Horita, Takashi Kuroi | 2000-12-19 |
| 6144079 | Semiconductor device and method of manufacturing the same | Masayoshi Shirahata | 2000-11-07 |
| 6020610 | Semiconductor device and method of manufacturing the same | Shuichi Ueno, Shigenobu Maeda, Shigeto Maegawa | 2000-02-01 |
| 5998828 | Semiconductor device having nitrogen introduced in its polysilicon gate | Shuichi Ueno, Shigenobu Maeda, Shigeto Maegawa | 1999-12-07 |
| 5932912 | Semiconductor device having LDD structure with a recess in the source/drain region which is formed during the removal of a damaged layer | Katsuyuki Horita, Takashi Kuroi | 1999-08-03 |
| 5763921 | Semiconductor device including retrograde well structure with suppressed substrate bias effects | Masahiko Takeuchi, Hideaki Arima | 1998-06-09 |
| 5627093 | Method of manufacturing a wiring layer for use in a semiconductor device having a plurality of conductive layers | Atsushi Hachisuka | 1997-05-06 |
| 5594264 | LDD semiconductor device with peak impurity concentrations | Masayoshi Shirahata | 1997-01-14 |
| 5536957 | MOS field effect transistor having source/drain regions surrounded by impurity wells | — | 1996-07-16 |