Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11803389 | Reach matrix scheduler circuit for scheduling instructions to be executed in a processor | Yusuf Cagatay Tekmen, Rodney Wayne Smith, Douglas C. Burger, Gagan Gupta | 2023-10-31 |
| 11113068 | Performing flush recovery using parallel walks of sliced reorder buffers (SROBs) | Yusuf Cagatay Tekmen, Rodney Wayne Smith, Shivam Priyadarshi | 2021-09-07 |
| 11061677 | Recovering register mapping state of a flushed instruction employing a snapshot of another register mapping state and traversing reorder buffer (ROB) entries in a processor | Yusuf Cagatay Tekmen, Rodney Wayne Smith, Shivam Priyadarshi, Vignyan Reddy Kothinti Naresh | 2021-07-13 |
| 10877768 | Minimizing traversal of a processor reorder buffer (ROB) for register rename map table (RMT) state recovery for interrupted instruction recovery in a processor | Shivam Priyadarshi, Yusuf Cagatay Tekmen, Rodney Wayne Smith, Vignyan Reddy Kothinti Naresh | 2020-12-29 |
| 10514921 | Fast reuse of physical register names | Tejaswi Talluru, Rodney Wayne Smith, Yusuf Cagatay Tekmen, Daniel Higdon, Jeffery M. Schottmiller +1 more | 2019-12-24 |
| 8127114 | System and method for executing instructions prior to an execution stage in a processor | James Norris Dieffenderfer, Michael Scott McIlvaine, Nathan Samuel Nunamaker | 2012-02-28 |