PL

Paul A. LaBerge

Micron: 106 patents #139 of 6,345Top 3%
UN Unisys: 5 patents #274 of 2,015Top 15%
RR Round Rock Research: 2 patents #110 of 239Top 50%
MT Mircon Technology: 1 patents #1 of 36Top 3%
Oracle: 1 patents #8,282 of 14,854Top 60%
Overall (All Time): #10,675 of 4,157,543Top 1%
116
Patents All Time

Issued Patents All Time

Showing 25 most recent of 116 patents

Patent #TitleCo-InventorsDate
12405856 Memory die fault detection using a calibration pin Scott E. Schaefer 2025-09-02
10297340 Switched interface stacked-die memory architecture Joe M. Jeddeloh 2019-05-21
10037818 Switched interface stacked-die memory architecture Joe M. Jeddeloh 2018-07-31
9875814 Switched interface stacked-die memory architecture Joe M. Jeddeloh 2018-01-23
9524254 Multi-serial interface stacked-die memory architecture Joe M. Jeddeloh 2016-12-20
9411538 Memory systems and methods for controlling the timing of receiving read data James B. Johnson 2016-08-09
9343180 Switched interface for stacked-die memory architecture with redundancy for substituting defective memory cells Joe M. Jeddeloh 2016-05-17
9275698 Memory system and method using stacked memory device dice, and system using the memory system Joseph M. Jeddeloh, James B. Johnson 2016-03-01
9146811 Method and apparatus for repairing high capacity/high bandwidth memory devices Joseph M. Jeddeloh 2015-09-29
8880833 System and method for read synchronization of memory modules Joseph M. Jeddeloh 2014-11-04
8806131 Multi-serial interface stacked-die memory architecture Joe M. Jeddeloh 2014-08-12
8793460 Memory system and method using stacked memory device dice, and system using the memory system Joseph M. Jeddeloh, James B. Johnson 2014-07-29
8787101 Stacked device remapping and repair Brent Keeth, Chris G. Martin, Troy A. Manning, Joe M. Jeddeloh, Timothy B. Cowles +1 more 2014-07-22
8756486 Method and apparatus for repairing high capacity/high bandwidth memory devices Joseph M. Jeddeloh 2014-06-17
8751754 Memory systems and methods for controlling the timing of receiving read data James B. Johnson 2014-06-10
8705301 System and method for controlling timing of output signals 2014-04-22
8619481 Switched interface stacked-die memory architecture Joe M. Jeddeloh 2013-12-31
8533416 Memory system and method using stacked memory device dice, and system using the memory system Joseph M. Jeddeloh, James B. Johnson 2013-09-10
8521979 Memory systems and methods for controlling the timing of receiving read data James B. Johnson 2013-08-27
8503258 Stacked device remapping and repair Brent Keeth, Chris G. Martin, Troy A. Manning, Joe M. Jeddeloh, Timothy B. Cowles +1 more 2013-08-06
8411521 System and method for controlling timing of output signals 2013-04-02
8406071 Strobe apparatus, systems, and methods James B. Johnson, Jake Klier 2013-03-26
8392686 System and method for read synchronization of memory modules Joseph M. Jeddeloh 2013-03-05
8320206 Stacked device remapping and repair Brent Keeth, Chris G. Martin, Troy A. Manning, Joe M. Jeddeloh, Timothy B. Cowles +1 more 2012-11-27
8254191 Switched interface stacked-die memory architecture Joe M. Jeddeloh 2012-08-28