Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12137162 | Key encryption handling | Steven D. Check | 2024-11-05 |
| 11650925 | Memory interface management | Eric R. Fox | 2023-05-16 |
| 11579791 | Partial save of memory | Jeffery J. Leyda | 2023-02-14 |
| 11579979 | Storage backed memory package save trigger | James E. Dunn | 2023-02-14 |
| 11514995 | Memory sub-system self-testing operations | Keith A. Benjamin | 2022-11-29 |
| 11074131 | Storage backed memory package save trigger | James E. Dunn | 2021-07-27 |
| 11070375 | Key encryption handling | Steven D. Check | 2021-07-20 |
| 10984881 | Memory sub-system self-testing operations | Keith A. Benjamin | 2021-04-20 |
| 10831393 | Partial save of memory | Jeffery J. Leyda | 2020-11-10 |
| 10642695 | Storage backed memory package save trigger | James E. Dunn | 2020-05-05 |
| 9437263 | Apparatuses and methods for providing strobe signals to memories | — | 2016-09-06 |
| 9171597 | Apparatuses and methods for providing strobe signals to memories | — | 2015-10-27 |
| 7827455 | System and method for detecting glitches on a high-speed interface | Peter Levinshteyn, Gary J. Lucas | 2010-11-02 |
| 7797472 | Method and apparatus for providing overlapping defer phase responses | Gregory B. Wiedenman, Kelvin S. Vartti | 2010-09-14 |
| 7739451 | Method and apparatus for stacked address, bus to memory data transfer | Gregory B. Wiedenman, Joel B. Artmann | 2010-06-15 |
| 7421545 | Method and apparatus for multiple sequence access to single entry queue | Gregory B. Wiedenman | 2008-09-02 |
| 7051131 | Method and apparatus for recording and monitoring bus activity in a multi-processor environment | Gregory B. Wiedenman, Mary C. Roskowiak | 2006-05-23 |
| 7003628 | Buffered transfer of data blocks between memory and processors independent of the order of allocation of locations in the buffer | Gregory B. Wiedenman, Raymond G. Ryan | 2006-02-21 |
| 6996645 | Method and apparatus for spawning multiple requests from a single entry of a queue | Gregory B. Wiedenman | 2006-02-07 |