GW

Gregory B. Wiedenman

UN Unisys: 13 patents #55 of 2,015Top 3%
SR Sperry Rand: 3 patents #3 of 84Top 4%
SP Sperry: 2 patents #196 of 841Top 25%
📍 Sandy, UT: #56 of 1,140 inventorsTop 5%
🗺 Utah: #972 of 19,430 inventorsTop 6%
Overall (All Time): #259,055 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
7797472 Method and apparatus for providing overlapping defer phase responses Nathan A. Eckel, Kelvin S. Vartti 2010-09-14
7739451 Method and apparatus for stacked address, bus to memory data transfer Nathan A. Eckel, Joel B. Artmann 2010-06-15
7421545 Method and apparatus for multiple sequence access to single entry queue Nathan A. Eckel 2008-09-02
7051131 Method and apparatus for recording and monitoring bus activity in a multi-processor environment Nathan A. Eckel, Mary C. Roskowiak 2006-05-23
7003628 Buffered transfer of data blocks between memory and processors independent of the order of allocation of locations in the buffer Nathan A. Eckel, Raymond G. Ryan 2006-02-21
6996645 Method and apparatus for spawning multiple requests from a single entry of a queue Nathan A. Eckel 2006-02-07
6012148 Programmable error detect/mask utilizing bus history stack Paul A. LaBerge 2000-01-04
5671369 Bus grant overlap circuit Paul A. LaBerge, Donald E. Harding 1997-09-23
5664089 Multiple power domain power loss detection and interface disable Larry L. Byers, David J. Tanglin, Paul A. LaBerge 1997-09-02
5581482 Performance monitor for digital computer system Randy L. DeGarmo 1996-12-03
5495589 Architecture for smart control of bi-directional transfer of data Donald W. Mackenthun, Larry L. Byers, Ferris T. Price, deceased 1996-02-27
5422915 Fault tolerant clock distribution system Larry L. Byers, Thomas T. Kubista 1995-06-06
5381416 Detection of skew fault in a multiple clock system Kelvin S. Vartti 1995-01-10
4646076 Method and apparatus for high speed graphics fill Kenneth S. Morley, Gary H. Frederickson, Jeffrey L. Williams 1987-02-24
4595996 Programmable video display character control circuit using multi-purpose RAM for display attributes, character generator, and refresh memory Kenneth S. Morley, James White 1986-06-17
4334287 Buffer memory arrangement Phillip W. Marsh 1982-06-08
4326291 Error detection system Phillip W. Marsh 1982-04-20
4237535 Apparatus and method for receiving and servicing request signals from peripheral devices in a data processing system 1980-12-02