Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12210413 | Data correction scheme with reduced device overhead | Joseph M. McCrate, Marco Sforzin, Paolo Amato, Nevil N. Gajera | 2025-01-28 |
| 12176029 | Drift aware read operations | Karthik Sarpatwari, Nevil N. Gajera, John F. Schreck | 2024-12-24 |
| 12032443 | Shadow DRAM with CRC+RAID architecture, system and method for high RAS feature in a CXL drive | Sandeep Krishna Thirumala, Amitava Majumdar, Nevil N. Gajera | 2024-07-09 |
| 12019516 | Instant write scheme with delayed parity/raid | Amitava Majumdar, Sandeep Krishna Thirumala, Nevil N. Gajera | 2024-06-25 |
| 12013756 | Method and memory system for writing data to dram submodules based on the data traffic demand | Amitava Majumdar, Sandeep Krishna Thirumala, Nevil N. Gajera | 2024-06-18 |
| 11942139 | Performing refresh operations on memory cells | Karthik Sarpatwari, Nevil N. Gajera, John Christopher Sancon | 2024-03-26 |
| 11782830 | Cache memory with randomized eviction | Amitava Majumdar, Sandeep Krishna Thirumala, Karthik Sarpatwari, Nevil N. Gajera | 2023-10-10 |
| 11775431 | Cache memory with randomized eviction | Amitava Majumdar, Sandeep Krishna Thirumala, Karthik Sarpatwari, Nevil N. Gajera | 2023-10-03 |
| 11694747 | Self-selecting memory cells configured to store more than one bit per memory cell | Xuan Anh Tran, Karthik Sarpatwari, Francesco Douglas Verna-Ketel, Jessica Chen, Nevil N. Gajera +1 more | 2023-07-04 |
| 11664074 | Programming intermediate state to store data in self-selecting memory cells | Karthik Sarpatwari, Nevil N. Gajera, Yen-Chun Lee, Jessica Chen, Francesco Douglas Verna-Ketel | 2023-05-30 |
| 11616098 | Three-dimensional memory arrays, and methods of forming the same | Karthik Sarpatwari, Fabio Pellizzer, Nevil N. Gajera, Lei Wei | 2023-03-28 |
| 11587614 | Read spike mitigation in integrated circuit memory | Josephine T. Hamada, Kenneth Richard Surdyk, Mingdong Cui | 2023-02-21 |
| 11545194 | Dynamic read voltage techniques | Karthik Sarpatwari, Nevil N. Gajera, Jessica Chen | 2023-01-03 |
| 11532347 | Performing refresh operations of non-volatile memory to mitigate read disturb | Karthik Sarpatwari, Nevil N. Gajera, John Christopher Sancon | 2022-12-20 |
| 11527287 | Drift aware read operations | Karthik Sarpatwari, Nevil N. Gajera, John F. Schreck | 2022-12-13 |
| 11508437 | Restoring memory cell threshold voltages | Nevil N. Gajera, Karthik Sarpatwari | 2022-11-22 |
| 11355554 | Sense lines in three-dimensional memory arrays, and methods of forming the same | Karthik Sarpatwari, Fabio Pellizzer, Nevil N. Gajera, Lei Wei | 2022-06-07 |
| 11114156 | Read spike mitigation in integrated circuit memory | Josephine T. Hamada, Kenneth Richard Surdyk, Mingdong Cui | 2021-09-07 |
| 10964385 | Restoring memory cell threshold voltages | Nevil N. Gajera, Karthik Sarpatwari | 2021-03-30 |
| 8692224 | High consistency resistive memory and manufacturing method thereof | Yinyin Lin | 2014-04-08 |