Issued Patents All Time
Showing 101–125 of 225 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7053444 | Method and apparatus for a flash memory device comprising a source local interconnect | Chun-Ming Chen | 2006-05-30 |
| 7035145 | Programming methods for multi-level flash EEPROMs | Chun-Ming Chen | 2006-04-25 |
| 6998314 | Fabricating a 2F2 memory device with a horizontal floating gate | — | 2006-02-14 |
| 6984547 | Contactless uniform-tunneling separate p-well (cusp) non-volatile memory array architecture, fabrication and operation | Chun-Ming Chen, Andrei Mihnea | 2006-01-10 |
| 6949795 | Structure and method of fabricating a transistor having a trench gate | Michael A. Smith, Mark A. Helm | 2005-09-27 |
| 6930350 | Contactless uniform-tunneling separate p-well (CUSP) non-volatile memory array architecture, fabrication and operation | Chun-Ming Chen, Andrei Mihnea | 2005-08-16 |
| 6927445 | Method to form a corrugated structure for enhanced capacitance | Randhir P. S. Thakur, Gordon A. Haller | 2005-08-09 |
| 6924186 | Method of forming a memory device and semiconductor device | Sukesh Sandhu | 2005-08-02 |
| 6882003 | Method and apparatus for a flash memory device comprising a source local interconnect | Chun-Ming Chen | 2005-04-19 |
| 6858526 | Methods of forming materials between conductive electrical components, and insulating materials | Werner Juengling, Ravi Iyer, Gurtej S. Sandhu, Guy T. Blalock | 2005-02-22 |
| 6845039 | Programming methods for multi-level flash EEPROMS | Chun-Ming Chen | 2005-01-18 |
| 6835619 | Method of forming a memory transistor comprising a Schottky contact | — | 2004-12-28 |
| 6812160 | Methods of forming materials between conductive electrical components, and insulating materials | Werner Juengling, Ravi Iyer, Gurtej S. Sandhu, Guy T. Blalock | 2004-11-02 |
| 6812512 | Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture | Howard E. Rhodes, Sujit Sharan, Gurtel Sandhu, Philip J. Ireland | 2004-11-02 |
| 6791140 | Memory transistor structure | — | 2004-09-14 |
| 6777732 | Random access memory | Robert Kerr, Christopher Murphy, D. Mark Durcan | 2004-08-17 |
| 6759707 | 2F2 memory device system | — | 2004-07-06 |
| 6750494 | Semiconductor buried contact with a removable spacer | — | 2004-06-15 |
| 6750502 | Technique to quench electrical defects in aluminum oxide film | Sukesh Sandhu | 2004-06-15 |
| 6737320 | Double-doped polysilicon floating gate | Chun-Ming Chen | 2004-05-18 |
| 6686238 | Method of forming a semiconductor memory device | Robert Kerr, Christopher Murphy, D. Mark Durcan | 2004-02-03 |
| 6686288 | Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture | Howard E. Rhodes, Sujit Sharan, Gurtel Sandhu, Philip J. Ireland | 2004-02-03 |
| 6667554 | Expanded implantation of contact holes | Howard E. Rhodes, Philip J. Ireland, Kenneth N. Hagen | 2003-12-23 |
| 6660611 | Method to form a corrugated structure for enhanced capacitance with plurality of boro-phospho silicate glass including germanium | Randhir P. S. Thakur, Gordon A. Haller | 2003-12-09 |
| 6649453 | Contactless uniform-tunneling separate p-well (CUSP) non-volatile memory array architecture, fabrication and operation | Chun-Ming Chen, Andrei Mihnea | 2003-11-18 |