Issued Patents All Time
Showing 76–100 of 225 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7588982 | Methods of forming semiconductor constructions and flash memory cells | Gurtej S. Sandhu | 2009-09-15 |
| 7577027 | Multi-state memory cell with asymmetric charge trapping | — | 2009-08-18 |
| 7569468 | Method for forming a floating gate memory with polysilicon local interconnects | Chun-Ming Chen, Guy T. Blalock, Graham R. Wolstenholme | 2009-08-04 |
| 7560769 | Non-volatile memory cell device and methods | Gurtej S. Sandhu | 2009-07-14 |
| 7541242 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2009-06-02 |
| 7535048 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2009-05-19 |
| 7517749 | Method for forming an array with polysilicon local interconnects | Chun-Ming Chen, Guy T. Blalock, Graham R. Wolstenholme | 2009-04-14 |
| 7485528 | Method of forming memory devices by performing halogen ion implantation and diffusion processes | Behnam Moradi, Seiichi Aritome, Di Li, Chris Larsen | 2009-02-03 |
| 7417280 | Method and apparatus for a flash memory device comprising a source local interconnect | Chun-Ming Chen | 2008-08-26 |
| 7338856 | Double-doped polysilicon floating gate | Chun-Ming Chen | 2008-03-04 |
| 7332419 | Structure and method of fabricating a transistor having a trench gate | Michael A. Smith, Mark A. Helm | 2008-02-19 |
| 7301804 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2007-11-27 |
| 7279740 | Band-engineered multi-gated non-volatile memory device with enhanced attributes | Arup Bhattacharyya, Luan C. Tran | 2007-10-09 |
| 7279710 | Structure and method of fabricating a transistor having a trench gate | Michael A. Smith, Mark A. Helm | 2007-10-09 |
| 7269072 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2007-09-11 |
| 7269071 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2007-09-11 |
| 7262503 | Semiconductor constructions | Werner Juengling, Ravi Iyer, Gurtej S. Sandhu, Guy T. Blalock | 2007-08-28 |
| 7220634 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2007-05-22 |
| 7199422 | Contactless uniform-tunneling separate P-well (CUSP) non-volatile memory array architecture, fabrication and operation | Chun-Ming Chen, Andrei Mihnea | 2007-04-03 |
| 7157305 | Forming multi-layer memory arrays | — | 2007-01-02 |
| 7115509 | Method for forming polysilicon local interconnects | Chun-Ming Chen, Guy T. Blalock, Graham R. Wolstenholme | 2006-10-03 |
| 7112542 | Methods of forming materials between conductive electrical components, and insulating materials | Werner Juengling, Ravi Iyer, Gurtej S. Sandhu, Guy T. Blalock | 2006-09-26 |
| 7112815 | Multi-layer memory arrays | — | 2006-09-26 |
| 7085164 | Programming methods for multi-level flash EEPROMs | Chun-Ming Chen | 2006-08-01 |
| 7072217 | Multi-state memory cell with asymmetric charge trapping | — | 2006-07-04 |